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| 型號(hào)： | IBM3288H2848 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 38/131頁(yè) |
| 文件大?。?/td> | 1679K |
| 代理商： | IBM3288H2848 |
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PRS28.4G
IBM Packet Routing Switch
Functional Description
Page 38 of 131
prs28.03.fm
August 31, 2000
3.5.1 Adapter Transmission Rules
The adapter maintains output queue grant status, which contains the following information:
An output queue grant bit for each PRS28.4G output i and for each priority p, that is set when the adapter
is allowed to transmit packets of priority p to output i. When the adapter receives a packet from the
PRS28.4G, it copies the 16 bits of header bytes 1 and 2 into its internal status table.
Four Memory grant bits, which override all output queue grant bits.
A simple rule to determine when an adapter may transmit a packet destined to a set of outputs with priority p
is:
The memory grant bit of the appropriate priority in the adapter must be set, and
If the packet is monocast, the output queue grant bits in the adapter must be set for the destination out-
put.
For multicast cells, it is recommended that only the memory grant bits be examined.
3.5.2 Flow Control Error
3.5.2.1 Shared Memory Overrun
As mentioned above, an PRS28.4G input can always receive a packet, with a packet storage address,
regardless of the full status of the output queues and shared memory. However, if a packet is received when
the input does not have an address, the packet is discarded and a Flow Control Violation interrupt is set. If not
masked, the main interrupt is asserted. This error can only occur if the Shared Memory Threshold bits have
not been programmed correctly, or if the adapter does not respond to the memory grant pin information.
Figure 8: Input-side Grant Operation
Receive
DASL
Transmit
DASL
Transmit
Ctrl
Receive
Ctrl
Receive
DASL
Transmit
DASL
Transmit
Ctrl
Receive
Ctrl
Full
Status
Full
Status
D0
D1
Adapter
Prizma - E
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