參數(shù)資料
型號: IBM3288H2848
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 104/131頁
文件大?。?/td> 1679K
代理商: IBM3288H2848
PRS28.4G
IBM Packet Routing Switch
I/O Definitions and Timing
Page 104 of 131
prs28.03.fm
August 31, 2000
The table above indicates which CIOs are enabled and by which internal signals. OCM_OCD_ENABLE is
directly generated by the OCM OCD_ENABLE command. The other signals are:
SEQ_CLK_OCD_ENABLE: Set to ‘1’b when the Sequencer Sync Pin Mode field of the Configuration
Register 0 is set to ‘01’b
MS_OCD_ENABLE: Set to ‘1’b when External Speed Expansion is enabled
MS_ADDR_OCD_ENABLE: Set to ‘1’b when External Speed Expansion is enabled and when the device
is Master
EMB_DATA_OUT_EN: Active only during OCM shift/scan (nEM_SELECT = ‘0’b)
RAM_BURN_IN
OCR with Pull-Down
Boundary
TTL
PLL_VDDA
Direct connection to PLL
None
-
VREF_MS_IN
OCR
None
-
VREF_MS_OUT
OCR
None
-
VREF_MS_SYNC
OCR
None
-
Table 23: I/O Summary
(Page 3 of 3)
Pin Name
OCR/OCD/CIO
JTAG
Boundary Cell
IO Level
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