參數(shù)資料
型號： GS4910BCNE3
廠商： Gennum Corporation
英文描述： HD/SD/Graphics Clock and Timing Generator with GENLOCK
中文描述： 高清/標清/圖形時鐘和定時發(fā)生器鎖相
文件頁數(shù)： 42/113頁
文件大?。?/td> 1017K
代理商： GS4910BCNE3
GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
42 of 113
3.3 Output Timing Format Selection
At device power-up (described in
Section 3.14 on page 106
), the application layer
should immediately set the external VID_STD[5:0] and ASR_SEL[2:0] pins. The
VID_STD[5:0] pins are used to select a pre-programmed output video format, or to
indicate that custom timing parameters will be programmed in the host interface.
The ASR_SEL[2:0] pins are only available on the GS4911B, and are used to select
the fundamental audio frequency or to turn off audio clock generation.
The output timing formats selectable by the user via the VID_STD[5:0] pins are
listed in
Section 1.4 on page 20
.
Table 3-7
in
Section 3.7.2 on page 63
lists the
audio sample rates available via the ASR_SEL[2:0] pins.
If the user sets VID_STD[5:0] =1-51 on power-up, the device will first check the
status of the GENLOCK pin. If GENLOCK is set LOW and a valid reference has
been applied to the inputs, the device will output the selected video standard while
attempting to genlock. However, if a reference signal has not been applied and
GENLOCK=LOW, the initial clock and timing outputs may be determined by the
internal default settings of the chip. If GENLOCK is set HIGH, the device will
immediately enter Free Run mode and will correctly output the selected video
standard.
If the user sets VID_STD[5:0] = 62 on power-up, the device will be configured to
generate custom output timing signals. The initial output timing signals will be equal
to the internal default timing of the chip until the user programs registers 4Eh to 55h
of the host interface (see
Section 3.10 on page 74
). Additionally, the output video
clock will run at a frequency determined by the internal default settings of the chip
until the user modifies it via registers 20h to 23h (see
Section 3.9.1 on page 72
).
If the user sets VID_STD[5:0] = 63 on power-up, the device will wait until a valid
reference has been applied, at which time it will output the same video format as
the input reference and enter Genlock mode if GENLOCK = LOW.
When operating in Free Run or Genlock mode, the GS4911B/GS4910B will
continuously monitor the settings of the VID_STD[5:0] and ASR_SEL[2:0] pins. If
the user wishes to change the format of the output clocks and timing signals, these
pins may be reconfigured at any time, although it is recommended that the device
be reset when changing output video standards.
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參數(shù)描述
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