參數(shù)資料
型號(hào)： GL9701
廠商： Genesys Logic, Inc.
英文描述： PCI ExpressTM to PCI Bridge
中文描述： 的PCI ExpressTM到PCI橋
文件頁(yè)數(shù)： 41/75頁(yè)
文件大小： 1077K
代理商： GL9701
GL9701 PCI Express
TM
to PCI Bridge
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 41
bit location. If the Parity Error Response Enable bit is set to zero,
this bit will not be set when an error is detected.
0
–
No uncorrectable data error detected on the secondary
interface.
1
–
Uncorrectable data error detected on the secondary
interface.
10:9
RO
01b
DEVSEL Timing
–
This bit field encodes the timing of the
secondary interface DEVSEL# as listed below.
00
–
Fast DEVSEL# decoding
01
–
Medium DEVSEL# decoding
10
–
Slow DEVSEL# decoding
11
–
Reserved
11
RW1C
0b
Signaled Target-Abort
–
This bit reports the signaling of a
Target-Abort termination by the bridge when it responds as the
target of a transaction on its secondary interface or when it signals
a PCI-X Split Completion with Target-Abort.
0
–
Target-Abort not signaled on secondary interface.
1
–
Target-Abort signaled on secondary interface.
12
RW1C
0b
Received Target-Abort
–
This bit reports the detection of a
Target-Abort termination by the bridge when it is the master of a
transaction on its secondary interface.
0
–
Target-Abort not detected on secondary interface.
1
–
Target-Abort detected on secondary interface.
13
RW1C
0b
Received Master-Abort
–
This bit reports the detection of a
Master-Abort termination by the bridge when it is the master of a
transaction on its secondary interface.
0
–
Master-Abort not detected on secondary interface.
1
–
Master-Abort detected on secondary interface.
14
RW1C
0b
Received System Error
–
This bit reports the detection of an
SERR# assertion on the secondary interface of the bridge.
0
–
SERR# assertion on the secondary interface has not
been detected.
1
–
SERR# assertion on the secondary interface has been
detected.
相關(guān)PDF資料
PDF描述
GL9701-MXG PCI ExpressTM to PCI Bridge
GL9711 PCI ExpressTM PIPE x1 PHY
GL9711-TGGXX PCI ExpressTM PIPE x1 PHY
GL9714 PCI ExpressTM PIPE x4 PHY
GL9714-TGGXX PCI ExpressTM PIPE x4 PHY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GL9701-MXG 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:PCI ExpressTM to PCI Bridge
GL9711 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9711-TGGXX 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9714 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY
GL9714-TGGXX 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY
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