參數(shù)資料
型號: GL9701
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM to PCI Bridge
中文描述: 的PCI ExpressTM到PCI橋
文件頁數(shù): 19/75頁
文件大?。?/td> 1077K
代理商: GL9701
GL9701 PCI Express
TM
to PCI Bridge
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 19
output enable via design option. Users can also probe the input
value by reading the design option.
If in normal function (OPMODE[1:0]=2
b01), then this bit is
used as internal signal output.
OPMODE[1:0]
I
Operation mode setup
TESTC
I
Test clock
TESTD
TS
Test data
CLKRUN_N
TS
A PCI device can request GL9701 to start, speed up, or maintain the
PCI clock by the assertion of CLKRUN_N. GL9701 is responsible
for maintaining CLKRUN_N asserted, and for driving it high to the
de-asserted state.
CLKRUN_N_E
N
I
Clock Run Enable
1
b1: Enable Clock Run
1
b0: Disable Clock Run
M66EN
I
Enable PCI clock act as 33MHz or 66MHz.
1: PCI Clocks are 66MHz.
0: PCI clocks are 33MHz
3.4.5 Power and Ground Signals
Name
Type
Description
VSS33
P
Ground for PCI PAD
VDD33
P
3.3V Power Supplier for PCI PAD
VSS18_AUX
P
Ground for 1.8 Vaux
VDD18_AUX
P
1.8Vaux Power Supplies for core voltage
VSS33_AUX
P
Ground for 3.3 Vaux
VDD33_AUX
P
3.3Vaux Power Supplies for core voltage
VSS18
P
Digital ground
VDD18
P
1.8V Power Supplies for core voltage
VSSGR
P
Ground for the guard ring of the SerDes block
VDDPLL
P
1.8V Power Supplies for internal PLL
VSSPLL
P
Ground for internal PLL
VSSRX
VDDRX
P
1.8V Power Supplies for receiver part
相關(guān)PDF資料
PDF描述
GL9701-MXG PCI ExpressTM to PCI Bridge
GL9711 PCI ExpressTM PIPE x1 PHY
GL9711-TGGXX PCI ExpressTM PIPE x1 PHY
GL9714 PCI ExpressTM PIPE x4 PHY
GL9714-TGGXX PCI ExpressTM PIPE x4 PHY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GL9701-MXG 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM to PCI Bridge
GL9711 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9711-TGGXX 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9714 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY
GL9714-TGGXX 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY