參數(shù)資料
型號(hào): GL9701
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM to PCI Bridge
中文描述: 的PCI ExpressTM到PCI橋
文件頁(yè)數(shù): 22/75頁(yè)
文件大?。?/td> 1077K
代理商: GL9701
GL9701 PCI Express
TM
to PCI Bridge
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 22
The GL9701 is composed of the following major functional blocks as shown in Figure 3-1:
PCI interface macro
The macro acts as either a bus master or a bus slave and handles the PCI protocol depending on the
transaction types. GL9701 supports 32-bit PCI addressing with 0MHz~33MHz and 66MHz operation
frequency.
Table3.1 summarizes the PCI commands supported by GL9701
Command Type
Encoding
I/O Read
0010
I/O Write
0011
Memory Read
0110
Memory Write
0111
Configuration Read
1010
Configuration Write
1011
Memory Read Multiple
1100
Memory Read Line
1110
Memory Write and
Invalidate
1111
Table 4.1
Supported PCI Command
Bus Arbiter
This block supports PCI bus arbiter for secondary PCI bus. The bus arbitration is provided by GL9701
and supports up to five external masters. The arbiter can be disabled by external EEPROM.
Configuration Registers
This module supports two mechanisms for configuration space access: PCI compatible and PCI Express
enhanced configuration mechanism.
Power Management
The moudle is in charge of power management event signaling. This module enables GL9701 to enter
software driven D-state transitions.
Transaction Translator
The Transaction Translator manages all the bridge operation between PCI Express and PCI interface. It
is responsible for PCI Express to PCI command translation, message translation and managing
transaction ordering.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GL9701-MXG 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM to PCI Bridge
GL9711 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9711-TGGXX 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY
GL9714 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY
GL9714-TGGXX 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY