參數(shù)資料
型號: DS3160
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 86/107頁
文件大小: 592K
代理商: DS3160
DS3160
86 of 107
9. JTAG
9.1 JTAG Description
The DS3160 device supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGH-Z, CLAMP, and IDCODE (Figure 9.1A). The
DS3160 contains the following items that meet the requirements set by the IEEE 1149.1 standard test
access port (TAP) and boundary scan architecture:
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
The TAP has the necessary interface pins, namely JTCLK,
JTRST
, JTDI, JTDO, and JTMS. Details on
these pins can be found in Section 2.9. Details about boundary scan architecture and the TAP are found in
IEEE 1149.1-1990, IEEE 1149.1a-1993, and IEEE 1149.1b-1994.
Figure 9.1A. JTAG BLOCK DIAGRAM
BOUNDARY
SCAN
REGISTER
IDENTIFICATION
REGISTER
BYPASS
REGISTER
INSTRUCTION
REGISTER
TEST-ACCESS-PORT
CONTROLLER
SELECT
TRI-STATE
JTDI
JTMS
JTCLK
10k
JTDO
M
JTRST
10k
10k
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