參數(shù)資料
型號(hào)： DS3160
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁(yè)數(shù)： 58/107頁(yè)
文件大?。?/td> 592K
代理商： DS3160
DS3160
58 of 107
Register Name:
Register Description:
Register Address:
INFO
Information Register
16h
Bit #
Name
Default
7
6
5
4
3
2
1
0
N/A
0
N/A
0
X1
1
X2
1
X3
1
EXZ
0
FBE
0
ZSCD
0
Bit #
Name
Default
15
N/A
0
14
N/A
0
13
N/A
0
12
N/A
0
11
10
9
8
RAIC
0
AISC
0
LOFC
0
LOSC
0
Note 1:
Bits that are underlined are read-only; all other bits are read-write.
Note 2:
The status bits in the INFO cannot cause a hardware interrupt to occur.
Bit 0/Zero Suppression Code Word Detected (ZSCD).
This latched read-only event-status bit is set to a
1 when the framer has detected a B8ZS code word. This bit is cleared when read and is not set again until
the framer has detected another B8ZS code word.
Bit 1/F-Bit or FAS Error Detected (FBE).
This latched read-only event-status bit is set to a 1 when the
DS3160 detects an error in the F-bits. This bit is cleared when read and is not set again until the device
detects another error.
Bit 2/Excessive Zeros Detected (EXZ).
This latched read-only event-status bit is set to a 1 each time the
DS3160 detects a consecutive string of either eight or more 0’s. A 0 is defined as no signal (pulses) on the
line for one clock period. This bit is cleared when read and is not set again until the device detects another
excessive zero event.
Bits 3, 4, 5/Spare Bits (X1, X2, X3).
These register bits contain the real-time values of the spare bit
locations (bits 785, 786, 787) of the third frame in the multiframe. X1 maps into bit 785. X2 maps into bit
786. X3 maps into bit 787. The DS3160 performs no integration on the spare bits.
Bit 8/Loss-of-Signal Clear Detected (LOSC).
This latched read-only event-status bit is set to a 1 each
time the framer exits an LOS state. This bit is cleared when read and is not set again until the device once
again exits the LOS state. The LOS alarm criteria is described in Table 5.3A.
Bit 9/Loss-of-Frame Clear Detected (LOFC).
This latched read-only event status bit is set to a 1 each
time the framer exits an LOF state. This bit is cleared when read and is not be set again until the device
once again exits the LOF state. The LOF alarm criteria is described in Table 5.3A.
Bit 10/Alarm Indication Signal Clear Detected (AISC).
This latched read-only event-status bit is set to
a 1 each time the framer no longer detects the AIS alarm state. This bit is cleared when read and is not set
again until the device once again exits the AIS alarm state. The AIS alarm criteria is described in Table
5.3A.
Bit 11/Remote Alarm Indication Clear Detected (RAIC).
This latched read-only event-status bit is set
to a 1 each time the framer no longer detects the RAI alarm state. This bit is cleared when read and is not
set again until the device once again exits the RAI alarm state. The RAI alarm criteria is described in
Table 5.3A.
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