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參數(shù)資料
| 型號(hào)： | DS3160 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 29/107頁(yè) |
| 文件大小： | 592K |
| 代理商： | DS3160 |
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DS3160
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4. MASTER DEVICE CONFIGURATION AND STATUS/INTERRUPT
4.1 Master Reset and ID Register Descriptions
The master reset and ID (MRID) register can be used to globally reset the device. When the RST bit is set
to 1, all of the internal registers are placed into their default state. A reset can also be invoked by the
RST
hardware signal.
The upper byte of the MRID register is read-only and can be read by the host to determine the chip
revision. Contact the factory for specifics on the meaning of the value read from the ID0 to ID7 bits.
Register Name:
Register Description:
Register Address:
MRID
Master Reset and ID Register
00h
Bit #
Name
Default
7
6
5
4
3
2
1
0
N/A
0
N/A
0
N/A
0
N/A
0
N/A
0
N/A
0
N/A
0
RST
0
Bit #
Name
Default
15
ID7
*
14
ID6
*
13
ID5
*
12
ID4
*
11
ID3
*
10
ID2
*
9
8
ID1
*
ID0
*
Note:
Bits that are underlined are read-only; all other bits are read-write.
Bit 0/Master Software Reset (RST).
When this bit is set to a 1 by the host, it forces all of the internal
registers to their default states. This bit must be set high for a minimum of 100ns. This software bit is
logically OR’ed with the hardware signal
RST
.
0 = normal operation
1 = force all internal registers to their default values
Bits 8 to 15/Chip Revision ID Bit 0 to 7 (ID0 to ID7).
Read-only. Contact the factory for details on the
meaning of the ID bits. MRID bits 15 (MSB) to 8 (LSB) are a binary coded hexidecimal number that
represents the die revision according to the product top brand. Example: 10100010 = A2.
*
Contact factory.
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