參數(shù)資料
型號: DS21FT42
元件分類: 通信及網(wǎng)絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 40/145頁
文件大?。?/td> 466K
代理商: DS21FT42
DALLAS SEMICONDUCTOR
DS21FF42/DS21FT42
101899
/1230
RZSE
CCR2.0
Receive FDL Zero Destuffer Enable.
Set this bit to zero if using the
internal HDLC/BOC controller instead of the legacy support for the
FDL. See Section 19 for details.
0 = zero destuffer disabled
1 = zero destuffer enabled
CCR3: COMMON CONTROL REGISTER 3
(Address=30 Hex)
(MSB)
RESMDM
(LSB)
TESMDM
TCLKSRC
RLOSF
RSMS
PDE
ECUS
TLOOP
SYMBOL
POSITION
NAME AND DESCRIPTION
RESMDM
CCR3.7
Receive Elastic Store Minimum Delay Mode.
See Section 17 for
details.
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32–bit depth
Transmit Clock Source Select.
This function allows the user to
internally select RCLK as the clock source for the transmit side
formatter.
0 = Transmit side formatter clocked with signal applied at TCLK pin.
LOTC Mux function is operational (TCR1.7)
1 = Transmit side formatter clocked with RCLK.
Function of the RLOS/LOTC Output.
Active only when FMS = 1
(DS21Q41 emulation).
0 = Receive Loss of Sync (RLOS)
1 = Loss of Transmit Clock (LOTC)
FMS is tied to ground for the DS21FF42/DS21FT42.
RSYNC Multiframe Skip Control.
Useful in framing format
conversions from D4 to ESF. This function is not available when the
receive side elastic store is enabled.
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe note: for this
bit to have any affect, the RSYNC must be set to output multiframe
pulses (RCR2.4=1 and RCR2.3=0).
Pulse Density Enforcer Enable.
0 = disable transmit pulse density enforcer
1 = enable transmit pulse density enforcer
Error Counter Update Select.
See Section 12 for details.
0 = update error counters once a second
1 = update error counters every 42 ms (333 frames)
Transmit Loop Code Enable.
See Section 20 for details.
0 = transmit data normally
1 = replace normal transmitted data with repeating code as defined in
TCD register
TCLKSRC
CCR3.6
RLOSF
CCR3.5
RSMS
CCR3.4
PDE
CCR3.3
ECUS
CCR3.2
TLOOP
CCR3.1
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