
ASAHI KASEI
[AK5700]
MS0569-E-01
2006/12
- 8 -
SWITCHING CHARACTERISTICS
(Ta=25
°
C; AVDD=2.4
~
3.6V; DVDD=1.6
~
3.6V; C
L
=20pF; unless otherwise specified)
Parameter
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
Pulse Width Low
Pulse Width High
MCKO Output Timing
Frequency
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
LRCK Output Timing
Frequency
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
BCLK Output Timing
Period
BCKO1-0 bit = “01”
BCKO1-0 bit = “10”
Duty Cycle
PLL Slave Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
Pulse Width Low
Pulse Width High
MCKO Output Timing
Frequency
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
EXLRCK Input Timing
Frequency
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
EXBCLK Input Timing
Period
Pulse Width Low
Pulse Width High
PLL Slave Mode (PLL Reference Clock = EXLRCK pin)
EXLRCK Input Timing
Frequency
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
EXBCLK Input Timing
Period
Pulse Width Low
Pulse Width High
Symbol
min
typ
max
Units
fCLK
tCLKL
tCLKH
11.2896
0.4/fCLK
0.4/fCLK
-
-
-
27
-
-
MHz
ns
ns
fMCK
dMCK
dMCK
0.2352
40
-
-
12.288
60
-
MHz
%
%
50
33
fs
7.35
-
-
-
48
-
-
kHz
ns
%
tLRCKH
Duty
tBCK
50
tBCK
tBCK
dBCK
-
-
-
1/(32fs)
1/(64fs)
50
-
-
-
ns
ns
%
fCLK
tCLKL
tCLKH
11.2896
0.4/fCLK
0.4/fCLK
-
-
-
27
-
-
MHz
ns
ns
fMCK
dMCK
dMCK
0.2352
40
-
-
12.288
60
-
MHz
%
%
50
33
fs
7.35
-
-
-
48
kHz
ns
%
tLRCKH
Duty
tBCK
60
45
1/fs
tBCK
55
tBCK
tBCKL
tBCKH
1/(64fs)
0.4 x tBCK
0.4 x tBCK
-
-
-
1/(32fs)
-
-
ns
ns
ns
fs
7.35
-
-
-
48
kHz
ns
%
tLRCKH
Duty
tBCK
60
45
1/fs
tBCK
55
tBCK
tBCKL
tBCKH
1/(64fs)
0.4 x tBCK
0.4 x tBCK
-
-
-
1/(32fs)
-
-
ns
ns
ns