參數(shù)資料
型號: AK5700VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 16-Bit ツヒ Mono ADC with PLL & MIC-AMP
中文描述: 16位ツヒ單聲道ADC,帶鎖相環(huán)
文件頁數(shù): 42/61頁
文件大小: 519K
代理商: AK5700VN
ASAHI KASEI
[AK5700]
MS0569-E-01
2006/12
- 42 -
Addr
12H
Register Name
Signal Select
Default
D7
0
0
D6
0
0
D5
0
0
D4
D3
0
0
D2
D1
0
0
D0
AIN
0
PMMP
0
MDIF1
0
AIN: ADC Input Source Select
0: AIN1 pin (Default)
1: AIN2 pin
MDIF1: ADC Input Type Select
0: Single-ended input (AIN1/AIN2 pin: Default)
1: Full-differential input (AIN+/AIN
pin)
PMMP: MPWR pin Power Management
0: Power down: Hi-Z (Default)
1: Power up
Addr
Register Name
13H
Mic Gain Control
Default
MGAIN1-0: MIC-Amp Gain Control (See Table 20)
Default: “01”(+15dB)
Addr
Register Name
14H
Audio Format Select
Default
DIF1-0: Audio Interface Format (See Table 15)
Default: “11” (I
2
S)
BCKP: BCLK/EXBCLK Polarity at DSP Mode (See Table 16)
“0”: SDTO is output by the rising edge (“
”) of BCLK/EXBCLK. (Default)
“1”: SDTO is output by the falling edge (“
”) of BCLK/EXBCLK.
MSBS: LRCK/EXLRCK Polarity at DSP Mode (See Table 16)
“0”: The rising edge (“
”) of LRCK/EXLRCK is half clock of BCLK/EXBCLK before the channel change.
(Default)
“1”: The rising edge (“
”) of LRCK/EXLRCK is one clock of BCLK/EXBCLK before the channel change.
D7
0
0
D6
0
0
D5
0
0
D4
0
0
D3
0
0
D2
0
0
D1
D0
MGAIN1
0
MGAIN0
1
D7
0
0
D6
0
0
D5
1
1
D4
0
0
D3
MSBS
0
D2
BCKP
0
D1
DIF1
1
D0
DIF0
1
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