
Philips Semiconductors
Video In
PRODUCT SPECIFICATION
6-9
6.4
HALFRES CAPTURE MODE
Halfres capture mode is identical in operation to fullres
capture mode except that horizontal resolution is re-
duced by a factor of two on both luminance and chromi-
nance data.
Referring to Figure 6-9 and Figure 6-11, if VI is pro-
grammed to capture HEIGHT lines of WIDTH pixels in
halfres mode, the resulting captured planar data is as
shown in Figure 6-12. Note that WIDTH/2 luminance and
WIDTH/4 chrominance samples are captured. In this
mode, START_X and WIDTH must be a multiple of four.
Horizontal-resolution reduction is performed as shown in
Figure 6-13 or Figure 6-14. The spatial sampling con-
ventions of the pixels in memory depends on the SC
(sampling convention) bit in the VI_CTL register. Assum-
ing that the camera sampling positions obey the conven-
tions shown in Figure 6-5, two possible spatial formats
are supported in memory:
If SC=0, co-sited luminance and chrominance sam-
ples result as shown in Figure 6-13. This corre-
sponds
to
the
standard
YUV
4:2:2
sampling
conventions.
If SC=1, interspersed chrominance samples result,
as shown in Figure 6-14. This form is (after vertical
subsampling of the chroma components) identical to
the MPEG-1 sampling conventions. If vertical sub-
sampling is desired, it can either be performed in
software on the DSPCPU or in hardware by the ICP.
The filtering process applies mirroring at the edge of the
active video area, as per Figure 6-7.
For both filters, computed video data is clamped to 01h if
result of the filter is less than 01h and clamped to FFh if
greater than FFh.
6.5
RAW CAPTURE MODES
All raw capture modes (raw8, raw10s and raw10u) be-
have similarly. VI_DATA information is captured at the
rate of the sender’s clock, without any interpretation or
start/stop of capture on the basis of the data values. Any
clock cycle in which VI_DVALID is asserted leads to the
capture of one data sample. Samples are 8 or 10 bits
long (raw8 versus raw10 modes). For the 8-bit capture
mode, four samples are packed to a word. For the 10-bit
capture modes, two 16-bit samples are packed to a
word. The extension from 10 to 16 bits uses sign exten-
sion (raw10s) or zero extension (raw10u).
For 8-bit and 16-bit capture, successive captured values
are written to increasing memory addresses. For 16-bit
YUV 4:2:2 CCIR656
input samples
ab
c
d
e
f
gh
i
j
k
l
Halfres capture
sample results
U
f
'
3
U
c
–
19
U
e
19
U
g
3
U
i
–
++
() 32
=
V
f
'
3
V
c
–
19
V
e
19
V
g
3
V
i
–
++
() 32
=
Y
h
'
3
Y
e
–
19
Y
g
32
Y
h
19
Y
i
3
Y
k
–
++
+
() 64
=
Figure 6-13. Halfres co-sited sample capture.
YUV 4:2:2 CCIR656
input samples
ab
c
d
e
f
gh
i
j
k
l
Halfres capture
sample results
Y
g
'
3
Y
d
–
19
Y
f
32
Y
g
19
Y
h
3
Y
j
–
++
+
() 64
=
U
f
'
3
U
c
–
19
U
e
19
U
g
3
U
i
–
++
() 32
=
V
f
'
3
V
c
–
19
V
e
19
V
g
3
V
i
–
++
() 32
=
Figure 6-14. Halfres interspersed sample capture.