
TM1300 Data Book
Philips Semiconductors
A-24
PRODUCT SPECIFICATION
Dual clipped absolute value of signed 16-bit
halfwords
pseudo-op for h_dspidualabs
SYNTAX
[ IF r
guard ] dspidualabs rsrc1
→ rdest
FUNCTION
if r
guard then {
temp1
← sign_ext16to32(rsrc1<15:0>)
temp2
← sign_ext16to32(rsrc1<31:16>)
if temp1 = 0xffff8000 then temp1
← 0x7fff
if temp2 = 0xffff8000 then temp2
← 0x7fff
if temp1 < 0 then temp1
← –temp1
if temp2 < 0 then temp2
← –temp2
r
dest<31:16>
← temp2<15:0>
r
dest<15:0>
← temp1<15:0>
}
ATTRIBUTES
Function unit
dspalu
Operation code
72
Number of operands
1
Modier
No
Modier range
—
Latency
2
Issue slots
1, 3
DESCRIPTION
The dspidualabs operation is a pseudo operation transformed by the scheduler into an h_dspidualabs with a
constant zero as rst argument and the dspidualabs argument as second argument. (Note: pseudo operations
cannot be used in assembly source les.)
The dspidualabs operation performs two 16-bit clipped, signed absolute value computations separately on the
high and low 16-bit halfwords of r
src1. Both absolute values are clipped into the range [0x0..0x7fff] and written into the
corresponding halfwords of r
dest. All values are signed 16-bit integers.
The dspidualabs operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB controls the
modication of the destination register. If the LSB of r
guard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
Initial Values
Operation
Result
r30 = 0xffff0032
dspidualabs r30
→ r60
r60
← 0x00010032
r10 = 0, r40 = 0x80008001
IF r10 dspidualabs r40
→ r70
no change, since guard is false
r20 = 1, r40 = 0x80008001
IF r20 dspidualabs r40
→ r100
r100
← 0x7fff7fff
r50 = 0x0032ffff
dspidualabs r50
→ r80
r80
← 0x00320001
r90 = 0x7fffffff
dspidualabs r90
→ r110
r110
← 0x7fff0001
SEE ALSO
h_dspidualabs dspiabs
dspidualadd dspidualmul
dspidualsub
dspidualabs