
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-161
16-bit store
pseudo-op for h_st16d(0)
SYNTAX
[ IF r
guard ] st16 rsrc1 rsrc2
FUNCTION
if r
guard then {
if PCSW.bytesex = LITTLE_ENDIAN then
bs
← 1
else
bs
← 0
mem[r
src1 + (1
⊕ bs)] ← rsrc2<7:0>
mem[r
src1 + (0
⊕ bs)] ← rsrc2<15:8>
}
ATTRIBUTES
Function unit
dmem
Operation code
30
Number of operands
2
Modier
No
Modier range
—
Latency
n/a
Issue slots
4, 5
DESCRIPTION
The st16 operation is a pseudo operation transformed by the scheduler into an h_st16d(0) with the same
arguments. (Note: pseudo operations cannot be used in assembly les.)
The st16 operation stores the least-signicant 16-bit halfword of r
src2 into the memory locations pointed to by the
address in r
src1. This store operation is performed as little-endian or big-endian depending on the current setting of
the bytesex bit in the PCSW.
If st16 is misaligned (the memory address in r
src1 is not a multiple of 2), the result of st16 is undened, and the
MSE (Misaligned Store Exception) bit in the PCSW register is set to 1. Additionally, if the TRPMSE (TRaP on
Misaligned Store Exception) bit in PCSW is 1, exception processing will be requested on the next interruptible jump.
The result of an access by st16 to the MMIO address aperture is undened; access to the MMIO aperture is
dened only for 32-bit loads and stores.
The st16 operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB controls the
modication of the addressed memory locations (and the modication of cache if the locations are cacheable). If the
LSB of r
guard is 1, the store takes effect. If the LSB of rguard is 0, st16 has no side effects whatever; in particular, the
LRU and other status bits in the data cache are not affected.
EXAMPLES
Initial Values
Operation
Result
r10 = 0xd00, r80 = 0x44332211
st16 r10 r80
[0xd00]
← 0x22, [0xd01] ← 0x11
r50 = 0, r20 = 0xd01,
r70 = 0xaabbccdd
IF r50 st16 r20 r70
no change, since guard is false
r60 = 1, r30 = 0xd02,
r70 = 0xaabbccdd
IF r60 st16 r30 r70
[0xd02]
← 0xcc, [0xd03] ← 0xdd
SEE ALSO
st16d h_st16d st8 st8d
st32 st32d
st16