參數(shù)資料
型號： 7640
英文描述： IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-PDIP, TUBE
中文描述： 7640組數(shù)據(jù)表數(shù)據(jù)表1885K/SEP.05.00
文件頁數(shù)： 57/97頁
文件大?。?/td> 1885K
代理商： 7640
56
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
The USB FCU is able to generate a USB function in-
terrupt as discussed in section 1.21.2.1. The
USB
Interrupt Status Registers (USBIS1, USBIS2)
,
shown in Figure 1.55 and Figure 1.56, are used to in-
dicate the condition that caused a USB function
interrupt to be generated. A “1” indicates that the cor-
responding condition caused a USB function interrupt.
The USB Interrupt Status Register can be cleared by
writing back to the register the same value that was
read. To ensure proper operation, the CPU should read
both USB interrupt status registers, then write back
the same values it read to these two registers for
clearing the status bits. The CPU must write to USB
Interrupt Status Register 1 first and then to USB Inter-
rupt Status Register 2. The registers cannot be
cleared by writing a “0” to the bits that are a “1”.
Fig. 1.55. USB Interrupt Status Register 1 (USBIS1)
INTST0
USB Endpoint 0 Interrupt Status Flag (bit 0)
Bit 1
Reserved (Read/Write “0”)
INTST2
INTST3
INTST4
INTST5
INTST6
INTST7
USB Endpoint 1 IN Interrupt Status Flag (bit 2)
USB Endpoint 1 OUT Interrupt Status Flag (bit 3)
USB Endpoint 2 IN Interrupt Status Flag (bit 4)
USB Endpoint 2 OUT Interrupt Status Flag (bit 5)
USB Endpoint 3 IN Interrupt Status Flag (bit 6)
USB Endpoint 3 OUT Interrupt Status Flag (bit 7)
0: No interrupt request issued
1: Interrupt request issued
INTST7
INTST5
INTST4
INTST2
Reserved
MSB
7
LSB
0
Address: 0052
16
Access: R/W
Reset: 00
16
INTST6
INTST3
INTST0
Fig. 1.56. USB Interrupt Status Register 2 (USBIS2)
INTST8
INTST9
USB Endpoint 4 In Interrupt Status Flag (bit 0)
USB Endpoint 4 Out Interrupt Status Flag (bit 1)
Bit 3:2
Reserved (Read/Write “0”)
INTST12
INTST13
INTST14
INTST15
USB Overrun/Underrun Interrupt Status Flag (bit 4)
USB Reset Interrupt Status Flag (bit 5)
USB Resume Signaling Interrupt Status Flag (bit 6)
USB Suspend Signaling Interrupt Status Flag (bit 7)
0: No interrupt request issued
1: Interrupt request issued
INTST15
INTST13
INTST12
Reserved
INTST9
MSB
7
LSB
0
Address: 0053
16
Access: R/W
Reset: 00
16
INTST14
Reserved
INTST8
相關PDF資料
PDF描述
7641 7641 Group Datasheet Datasheet 2145K/MAR.26.02
7643 IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-SOIC 300mil, TUBE
765-11-(SERIES) Analog IC
765-11-20K Analog IC
765-11-25A Analog IC
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