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參數(shù)資料
| 型號： | XRT82L34 |
| 廠商： | Exar Corporation |
| 英文描述： | Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| 中文描述： | 四路T1/E1/J1收發(fā)線收發(fā)器時鐘恢復(fù)和抖動衰減器（四的T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）） |
| 文件頁數(shù)： | 8/50頁 |
| 文件大?。?/td> | 648K |
| 代理商： | XRT82L34 |
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XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.5
á
PRELIMINARY
6
15
RD_DS
TxOff1
I
Read Input (Data Strobe).
With Intel bus timing, a Low pulse on RD selects a read operation when CS pin
is Low. When configured in Motorola bus timing, a Low pulse on DS indicates a
read or write operation when CS pin is Low.
Powered-down Transmitter 1
.
In Hardware Mode, tie this pin "High" to power-down channel 1 transmitter and
set TTIP1 and TRing1 to high impedance.
N
OTE
:
Internally pulled -up with a 50k
resistor.
16
ALE_AS
TxOFF2
I
Address Latch Input (Address Strobe)
.
With Intel bus timing, the address inputs are latched into the internal register on
the falling edge of ALE. When configured in Motorola bus timing, the address
inputs are latched into the internal register on the falling edge of AS.
Powered-down Transmitter 2
.
In Hardware Mode, tie this pin "High" to power-down channel 2 transmitter and
set TTIP2 and TRing2 to high impedance.
N
OTE
:
Internally pulled -up with a 50k
resistor.
17
CS
TxOFF3
I
Chip Select Input
.
This signal must be Low in order to access the parallel port.
Powered-down Transmitter 3
.
In Hardware Mode, tie this pin "High" to power-down channel 3 transmitter and
set TTIP3 and TRing3 to high impedance.
N
OTE
:
Internally pulled -up with a 50k
resistor.
18
RDY_DTACK
O
Ready Output (Data Transfer Acknowledge Output)
.
With Intel bus timing, RDY is asserted "High" to indicate the device has com-
pleted a read or write operation. When configured in Motorola bus timing,
DTACK is asserted Low to indicate the device has completed a read or write
cycle.
N
OTE
:
Internally pulled -up with a 50k
resistor.
19
INT
O
Interrupt Output
.
This pin is asserted Low to indicate an alarm condition has occurred within the
device. Interrupt generation can be globally disabled by setting the GIE bit to a
"0" in the command control register.
N
OTE
:
This pin is an open drain output and requires an external 10K
pull-up
resistor.
20
ICT
I
In-Circuit Testing (Active Low)
.
When this pin is tied Low, all output pins are forced to high impedance state for
in-circuit testing.
N
OTE
:
Internally pulled -up with 50k
.
21
TxClk1
I
Transmitter 1 Clock Input
.
E1 rate at 2.048MHz ± 50ppm. T1 rate at 1.544MHz ±32ppm (see pin 5 descrip-
tion for other usage of this pin.)
N
OTE
:
Internally pulled -up with a 50k
resistor.
22
TxPOS1/
TData1
I
Transmitter 1 Positive Data Input
.
In dual-rail mode, this signal is the p-rail input data for transmitter 1.
Transmitter 1 NRZ Data Input
.
In single-rail mode, this signal is used as the NRZ input data for transmitter 1.
N
OTE
:
Internally pulled -up with a 50k
resistor.
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT82L38 | Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| XRT83D10 | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10IW | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83L314 | 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT |
| XRT83L314IB | 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT82L34IV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| XRT83D10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10ES | 功能描述:外圍驅(qū)動器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW-F | 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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