參數(shù)資料
型號(hào)： XRT82L34
廠商： Exar Corporation
英文描述： Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
中文描述： 四路T1/E1/J1收發(fā)線收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器（四的T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器））
文件頁數(shù)： 16/50頁
文件大?。?/td> 648K
代理商： XRT82L34
XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.5
á
PRELIMINARY
14
Degraded Type of Loss of Signal Event (Non-Zero
Amplitude)
If the XRT82L34 experiences a degraded type of LOS
event (e.g., where there is still a small amount of dis-
cernible signal amplitude in the line signal, but small
enough to qualify as an LOS event) then the Clock
Recovery PLL could lock onto this degraded line sig-
nal and will subsequently drive the same frequency
via the RxClk output pins.
DECLARING AND CLEARING LOS IN THE DS1
MODE.
Each channel of the XRT82L34 has two criteria for
LOS Detection,
Analog
and
Digital
. A channel will
declare an LOS condition when both of these LOS
Detectors detects an LOS condition.
Analog LOS Detector
If a given channel is configured to operate in the DS1
Mode, then the Analog LOS Detector will declare an
LOS condition, if it determines that the amplitude of
the incoming line signal has dropped -15dB (below
the nominal pulse amplitude of 3V) for at least 175
consecutive bit-periods.
Conversely, the Analog LOS Detector will clear the
LOS condition, if it determines that the incoming line
signal is no more than 12.5dB below the nominal 3V
pulse amplitude.
N
OTE
:
The difference in the signal level required to declare
and clear LOS is 2.5dB. This 2.5dB hysteresis is designed
into the Analog LOS Detector circuitry, in order to prevent
chattering in the LOS output pin or bit-field.
Digital LOS Detector
If a given channel is configured to operate in the DS1
Mode, then the Digital LOS Detector will declare an
LOS condition, if it detects a string of at least 175
consecutive zeroes within the receive data stream.
The Digital LOS Detector will clear the LOS condition,
if it determines that the incoming DS1 line signal has
a pulse density of 12.5% or more.
N
OTE
:
The pulse density requirement of 12.5% accounts
for B8ZS coding.
CONDITIONS FOR DECLARING AND CLEARING
LOS IN THE E1 MODE.
Similar to the DS1 mode, each E1 channel of the
XRT82L34 has two criteria for LOS Detection,
Ana-
log
and
Digital
. A channel will declare an LOS condi-
tion when both of these LOS Detectors detect an
LOS condition.
Analog LOS Detector
If a given channel is configured to operate in the E1
Mode, then the Analog LOS Detector will declare an
LOS condition, if it determines that the amplitude of
the incoming line signal has dropped to less than
-15dB (below the nominal pulse amplitude of 3V for
twisted-pair
, or 2.37V for
coaxial-cable
) for at least
32 bit-periods.
The Analog LOS Detector will clear the LOS condi-
tion, if it determines that the incoming line signal is no
more than 12.5dB below the nominal 3V pulse ampli-
tude.
N
OTE
:
The difference in the signal level required to declare
and clear LOS is 2.5dB. This 2.5dB hysteresis is designed
into the Analog LOS Detector circuitry, in order to prevent
chattering in the LOS output pin or bit-field.
Digital LOS Detector
If a given channel is configured to operate in the E1
Mode, then the Digital LOS Detector will declare an
LOS condition, if it detects a string of at least 32 con-
secutive "0"s.
The Digital LOS Detector will clear the LOS condition,
if it determines that the incoming E1 line signal has a
pulse density of 25% or more, for at least 32 consecu-
tive bit periods.
N
OTE
:
The pulse density requirement of 25% accounts for
HDB3 coding.
RECEIVE DATA MUTING
The XRT82L34 permits the user to “MUTE” the re-
covered data output signals anytime the LOS condi-
tion is declared. If the user invokes this function, then
the RPOS/RDAT and RNEG output pins will be pulled
to GND for the duration that the LOS condition exists.
This feature is useful in that it prevents the LIU from
routing electrical noise (which has been “recovered”
by the Clock Recovery PLL) to the Framer IC and pre-
venting it from declaring an LOS condition. This fea-
ture is enabled by setting the RXMUTE bit to a “1” in
the Host Mode or by connecting pin 67 High in the
Hardware Mode.
LOOP-BACK MODES
Each channel within the XRT82L34 can be config-
ured to operate in any of the following loop-back
modes:
Remote Loop-Back Mode
Digital Local Loop-Back Mode
Analog Local Loop-Back Mode
Each of these loop-back modes are described in
some detail below.
REMOTE LOOP-BACK (RLOOP) MODE
With Remote Loop-Back activated, received data af-
ter the jitter attenuator (if selected) is looped back to
the transmit path using RxClk as transmit timing. In
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