參數(shù)資料
型號(hào): XRT82L34
廠商: Exar Corporation
英文描述: Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器(帶時(shí)鐘恢復(fù)和振蕩衰減器))
中文描述: 四路T1/E1/J1收發(fā)線收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器(四的T1/E1/J1線收發(fā)器(帶時(shí)鐘恢復(fù)和振蕩衰減器))
文件頁(yè)數(shù): 35/50頁(yè)
文件大小: 648K
代理商: XRT82L34
á
XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.5
33
T
ABLE
15: C
OMMAND
C
ONTROL
R
EGISTER
1
C
OMMAND
C
ONTROL
R
EGISTER
1
P
ARALLEL
P
ORT
A
DDRESS
: 0001
B
IT
N
O
.
N
AME
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
7
--
Reserved. Must be set to “0” for proper operation.
R/W
0
6
--
Reserved. Must be set to “0” for proper operation.
R/W
0
5
FIFOS
FIFO Size Select: Writing a "1" to this bit selects 64 bit FIFO
depth. Write "0" to select 32 bit FIFO depth.
R/W
0
4
RxJA
Receive Jitter Attenuator Select: Writing a "1" to this bit selects jit-
ter attenuator in the receive path. If bit 3(TxJA) is also set, jitter
attenuator is disabled.
R/W
0
3
TxJA
Transmit Jitter Attenuator Select: Writing a "1" to this bit selects
jitter attenuator in the transmit path. If bit 4(RxJA) is also set, jitter
attenuator is disabled.
R/W
0
2
RXMUTE
Receive Muting: Writing a "1" to this bit mutes receive data output
to a low state during LOS condition to prevent data chattering.
R/W
0
1
EXLOS
Extended LOS: Writing a "1" to this bit extends the number of
zeros at the input to 4096 bits before LOS is declared.
R/W
0
0
ICT
In-Circuit-Testing: Writing a "1" to this bit causes all output pins to
be in high impedance mode for in-circuit testing. The software
ICT function is equivalent to connecting pin 20 to ground.
R/W
0
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