參數(shù)資料
型號(hào)： XRT82L34
廠商： Exar Corporation
英文描述： Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
中文描述： 四路T1/E1/J1收發(fā)線收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器（四的T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器））
文件頁數(shù)： 4/50頁
文件大小： 648K
代理商： XRT82L34
XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.5
á
PRELIMINARY
I
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
F
EATURES
.................................................................................................................................................... 1
A
PPLICATIONS
.............................................................................................................................................. 1
Figure 1. Block Diagram of the XRT82L34 T1/E1/J1 LIU (Host Mode) ................................................. 1
Figure 2. Block Diagram of the XRT82L34 T1/E1/J LIU (Hardware Mode) ........................................... 2
Figure 3. Pin Out of the XRT82L34 .......................................................................................................... 3
TABLE OF CONTENTS ....................................................................................................... I
PIN DESCRIPTION ............................................................................................................. 4
SYSTEM-FUNCTIONAL DESCRIPTION ......................................................................... 13
R
ECEIVER
.................................................................................................................................................. 13
J
ITTER
A
TTENUATOR
.................................................................................................................................. 13
HDB3/B8ZS D
ECODER
.............................................................................................................................. 13
R
ECEIVER
L
OSS
OF
S
IGNAL
(LOS) .............................................................................................................. 13
C
LOCK
SIGNALS
GENERATED
WHEN
LOS
IS
DECLARED
................................................................................ 13
D
ECLARING
AND
C
LEARING
LOS
IN
THE
DS1 M
ODE
. ................................................................................... 14
C
ONDITIONS
FOR
DECLARING
AND
CLEARING
LOS
IN
THE
E1 M
ODE
. ............................................................ 14
R
ECEIVE
D
ATA
M
UTING
.............................................................................................................................. 14
LOOP-BACK MODES .............................................................................................................................. 14
R
EMOTE
L
OOP
-B
ACK
(RLOOP) MODE ...................................................................................................... 14
D
IGITAL
L
OCAL
LOOP
-B
ACK
(DLOOP)
MODE
............................................................................................... 15
A
NALOG
LOCAL
L
OOP
-B
ACK
(ALOOP)
MODE
.............................................................................................. 15
Figure 4. Remote Loop-Back with jitter attenuator selected in receive path .................................... 15
Figure 5. Remote Loop-Back with jitter attenuator selected in transmit path .................................. 15
Figure 6. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in re-
ceive path) .............................................................................................................................. 16
Figure 7. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in
transmit path) ......................................................................................................................... 16
Figure 8. Analog Local Loop-Back signal flow Jitter Attenuator selected & in Receive path ........ 17
Figure 9. Analog Local Loop-Back signal flow Jitter Attenuator selected & in transmit path ........ 17
R
ESET
O
PERATION
..................................................................................................................................... 17
R
ECEIVER
M
ODES
OF
O
PERATION
............................................................................................................... 17
R
ECEIVE
D
ATA
I
NVERT
M
ODE
..................................................................................................................... 17
Figure 10. Data changes on rising edge of Clk and Data is sampled on falling edge ..................... 18
Figure 11. Data changes on falling edge of Clk and is sampled on rising edge .............................. 18
T
RANSMIT
C
LOCK
S
AMPLING
E
DGE
............................................................................................................. 18
SINGLE
RAIL
, D
UAL
RAIL
.............................................................................................................................. 18
T
RANSMIT
A
LL
O
NES
(TAOS) ..................................................................................................................... 18
HDB3/B8ZS/AMI E
NCODER
....................................................................................................................... 18
T
RANSMIT
P
ULSE
S
HAPER
.......................................................................................................................... 19
D
RIVER
M
ONITOR
....................................................................................................................................... 19
TRANSMIT
OFF
CONTROL
............................................................................................................................ 19
T
ABLE
1: E
XAMPLES
OF
B8ZS E
NCODING
.................................................................................................. 19
T
ABLE
2: T
RANSMIT
E
QUALIZER
C
ONTROL
................................................................................................. 19
I
NTERFACING
THE
XRT82L34
TO
THE
L
INE
................................................................................................. 19
Figure 12. XRT82L34 Channel 1in an E1 unbalanced 75 W application ............................................ 20
Figure 13. XRT82L34 Channel 1 - E1 120 W balanced application .................................................... 20
Figure 14. XRT82L34 Channel 1 - DS1 100 W Balanced application ................................................. 21
T
ABLE
3: E1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
............................................................................. 22
T
ABLE
4: T1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
............................................................................. 23
T
ABLE
5: E1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
....................................................................... 23
T
ABLE
6: T1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
....................................................................... 24
T
ABLE
7: T
RANSMIT
P
ULSE
M
ASK
S
PECIFICATION
...................................................................................... 25
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