參數(shù)資料
型號(hào)： XRT82L34
廠商： Exar Corporation
英文描述： Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
中文描述： 四路T1/E1/J1收發(fā)線收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器（四的T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器））
文件頁(yè)數(shù)： 36/50頁(yè)
文件大?。?/td> 648K
代理商： XRT82L34
XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.5
á
PRELIMINARY
34
T
ABLE
16: C
HANNEL
S
TATUS
R
EGISTER
C
HANNEL
S
TATUS
R
EGISTER
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
0: 0010
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
1: 0101
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
2: 1000
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
3: 1011
B
IT
N
O
.
S
YMBOL
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
7
DMOn
Driver Monitor Output: This bit is set to a "1" to indicate current DMO is
detected. Any change in the state of this bit causes an interrupt to be gener-
ated. Reading this register bit does not clear the DMO bit.
R
0
6
LOSn
Loss of Signal: This bit is set to a "1" to indicate current LOS condition is
detected. Any change in the state of this bit causes an interrupt to be gener-
ated. Reading this register bit does not clear the LOS bit.
R
0
5
LCVn
Line Code Violation: This bit is set to a "1" to indicate current LCV condition
is detected. Any change in the state of this bit causes an interrupt to be gen-
erated. Reading this register bit does not clear the LCV bit.
R
0
4
TCKLn
Transmit Clock Loss: This bit is set to a "1" to indicate current TxClk clock
loss is detected. Any change in the state of this bit causes an interrupt to be
generated. Reading this register bit does not clear the TCKL bit.
R
0
3
DMOnIS Driver Monitor Output: This bit is set to a "1" every time the state of DMO
status changes since last read. This bit is cleared by a read operation.
RUR
0
2
LOSnIS
Latched- Loss of signal: This bit is set to a "1" every time the state of LOS
changes since last read. This bit is cleared by a read operation.
RUR
0
1
LCVnIS
Latched- Line Code Violation: This bit is set to a "1" every time the state of
LCV changes since last read. This bit is cleared by a read operation.
RUR
0
0
TCLKnIS Latched-Transmit Clock Loss. This bit is set to a "1" every time the state of
TCKL changes since last read. This bit is cleared by a read operation.
RUR
0
NOTE: n = channel number 0 to 3.
相關(guān)PDF資料
PDF描述
XRT82L38 Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
XRT83D10 SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
XRT83D10IW SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
XRT83L314IB 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT82L34IV 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC
XRT83D10 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
XRT83D10ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83D10IW 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83D10IW-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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