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PRELIMINARY
DS3 UNI FOR ATM
XRT7245
REV. 1.03
185
Final Notes about the Transmit PLCP Processor
The Transmit PLCP Processor will be disabled, upon
power up or reset. Therefore, the user must write a
“1” to this bit in order to enable the PLCP Processor.
Selection of this bit affects both the Transmit PLCP
Processor and the Receive PLCP Processor.
The advantage of selecting the “Direct-Mapped ATM”
option is to result in a more efficient use of the DS3
Bandwidth. This is because in the Direct Mapped
ATM mode, the user is not required to include all of
the POH bytes that must be included in PLCP frames.
The Transmit PLCP Processor will inform the external
circuitry that a PLCP frame has been assembled and
transmitted out of the PLCP Processor by pulsing the
TxPFrame output pin ‘high’ during the transmission of
the last trailer nibble.
6.4
Transmit DS3 Framer
6.4.1
Brief Description of the Transmit
DS3 Framer
The Transmit DS3 Framer takes the incoming data,
which can be either PLCP frames from the Transmit
PLCP Processor or ATM Cells from the Transmit Cell
Processor and maps it into the payload portion of the
DS3 frame. The Transmit DS3 Framer supports either
the M13 or C-Bit Parity frame formats. The Transmit
DS3 Framer operates at 44.736 MHz and framing is
derived from an input clock signal. The framing over-
head bits are generated and inserted with the DS3
payload bits to make up the complete DS3 frame. The
DS3 frame is then encoded into either the Unipolar, AMI
or B3ZS line codes. When the Transmit DS3 Framer is
operating in the C-Bit Parity Framing format, it provides
an interface that supports the transmission of path
maintenance data link messages on the outgoing DS3
frames via the on-chip LAPD Transmitter. The Transmit
DS3 Framer also includes an on-chip Transmit FEAC
Processor that supports the transmission of FEAC (Far
End Alarm and Control) messages over the outgoing
DS3 frame. Different transmission conditions like AIS
(Alarm Indication Signal), Idle Condition and the Yellow
Alarm can be generated upon software command.
Further, the LOS (Loss of Signal) condition can be
simulated upon software command.
6.4.2
Detailed Functional Description of the
Transmit DS3 Framer
The Transmit DS3 Framer receives PLCP frames
from the Transmit PLCP block, or ATM Cells from the
Transmit Cell Processor, and inserts this data into the
payload portion of each outbound DS3 frame. The
Transmit DS3 Framer proceeds to generate the over-
head (OH) bits and interleave these bits with the DS3
payload bits to form the complete DS3 data stream.
The Transmit DS3 Framer will then encode this DS3
Frame Data into a Unipolar Format (for transmission
over optical fiber) or in a Bipolar format (AMI or B3ZS
line code) for transmission over a transformer coupled
copper medium, to a far away DS3 Receiver Terminal
via an LIU IC.
The Transmit DS3 Framer also provides a serial input
port to allow the user to insert his/her own OH bits in-
to the outbound DS3 Frame. Finally, the Transmit
DS3 Framer allows the user to insert errors into the
Framing Bits or transmit various alarm conditions via
software control in order to support equipment testing
as well as transmitting the appropriate alarm signals
as conditions warrant.
Figure 49 presents a simple illustration of the Transmit
DS3 Framer block, along with the associated external
pins.
Figure 49 presents a functional block diagram of the
Transmit DS3 Framer block.
F
IGURE
49. A S
IMPLE
I
LLUSTRATION
OF
THE
T
RANSMIT
DS3 F
RAMER
B
LOCK
AND
THE
ASSOCIATED
E
XTERNAL
P
INS
TxPOS
TxNEG
Transmit
DS3
Framer
TxFrame
TxOHClk
TxLineClk
TxAISEn
TxFrameRef
TxInClk
TxOHIns
TxOH
From Transmitter PLCP
Processor
To DS3 Line Interface Unit