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參數(shù)資料
| 型號： | SAA5667HL/NNNN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 51/112頁 |
| 文件大?。?/td> | 537K |
| 代理商： | SAA5667HL/NNNN |
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2004 Sep 03
43
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
13 TIMERS/COUNTERS
Three 16-bit Timers/counters are incorporated: Timer 0,
Timer 1 and Timer 2. Each can be configured to operate
as either timers or event counters. Timer 2 is new for the
SAA56xx, whereas Timer 0 and Timer 1 are standard
80C51 Timer/counters, refer to
“Handbook IC20
80C51-Based 8-bit Microcontrollers”. Remark: It should
be noted that because the SAA56xx uses both clock
edges, the division factor is 6 instead of 12.
When the Timers/counters are configured as timers, the
period depends on the microcontroller clock frequency of
12 MHz.
In Timer mode, the register is incremented on every
machine cycle, so that machine cycles are counted. Since
the machine cycle consists of six oscillator periods, the
count rate is 1
6fclk (where fclk is the microcontroller clock
frequency: 12 MHz).
In Counter mode, the register is incremented in response
to a negative transition at its corresponding external pin
T0/T1/T2. Since pins T0/T1/T2 are sampled once per
machine cycle, it takes two machine cycles to recognise a
transition. This gives a maximum count rate of 1
12fclk
(where fclk is the microcontroller clock frequency, 12 MHz).
13.1
Timer/counter 0 and Timer/counter 1
There are six Special Function Registers used to control
Timer/counter 0 and Timer/counter 1.
Table 13 Timer/counter 0 and Timer/counter 1 registers
The Timer/counter function is selected by control bits C/T
in the Timer Mode SFR(TMOD). These two
Timers/counters have four operating modes, which are
selected by bit-pairs (M1 and M0) in TMOD. Details of the
modes of operation is given in
“Handbook IC20,
80C51-Based 8-Bit Microcontrollers”.
TL0 and TH0 are the actual Timer/counter registers for
Timer 0. TL0 is the low byte and TH0 is the high byte. TL1
and TH1 are the actual Timer/counter registers for
Timer 1. TL1 is the low byte and TH1 is the high byte.
13.2
Timer/counter 2
Timer 2 is controlled using the following SFRs:
Table 14 Timer 2 Special Function Registers
Timer 2 can operate in four different modes
(see Table 15):
Auto-reload
Capture
Baud rate generation
Clock output.
The count-down option is only possible in the Auto-reload
mode with DCEN in T2MOD set and the external trigger
input disabled.
Table 15 Timer 2 operating mode
13.2.1
CAPTURE MODE
In the Capture mode, registers RCAP2L/RCAP2H are
used to capture the TL2/TH2 data. By setting/clearing bit
EXEN2 in T2CON, the external trigger input T2EX (P3.4)
can be enabled/disabled. If EXEN2 = 0, Timer 2 is a 16-bit
Timer/counter which, upon overflow, sets TF2 flag in
T2CON. If EXEN2 = 1, then Timer 2 does the above, but
with the added feature that a HIGH-to-LOW transition at
T2EX on Port 3.4 causes the current Timer 2 value
(TL2/TH2 data) to be captured into RCAP2L/RAP2H, and
bit EXF2 in T2CON to be set.
SFR
ADDRESS
TCON
88H
TMOD
89H
TL0
8AH
TH0
8BH
TL1
8CH
TH1
8DH
SFR
ADDRESS
T2CON
F1H
T2MOD
F2H
RCAP2L
F3H
RCAP2H
F4H
TL2
F5H
TH2
F6H
RCLK0 OR
TCLK0 OR
RCLK1 OR
TCLK1
CP/RL2 T2OE C/T2
OPERATING
MODE
0
X
16-bit Auto-reload
0
1
0
X
16-bit Capture
1
X
Baud rate
generation
X
0
1
0
Clock output
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