參數(shù)資料
型號: SAA5667HL/NNNN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100
文件頁數(shù): 44/112頁
文件大?。?/td> 537K
代理商: SAA5667HL/NNNN
2004 Sep 03
37
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
handbook, full pagewidth
GSA070
XRAMP SFR = 00H
FFH
00H
XRAMP SFR = 01H
FFH
00H
0000H
00FFH
0100H
01FFH
XRAMP SFR = FEH
MOVX @ DPTR,A
MOVX A, @ DPTR
MOVX @ Ri,A
MOVX A, @ Ri
FFH
00H
0800H
08FFH
Allocated(1)
Not Allocated
XRAMP SFR = FFH
FFH
00H
2000H
20FFH
XRAMP SFR = FFH
FFH
00H
4000H
4FFFH
XRAMP SFR = FFH
FFH
00H
FF00H
FFFFH
Fig.9 Indirect addressing of MOVX RAM.
(1) Internal 14-kbyte data and display RAM of the device.
9
POWER-ON RESET
Two reset inputs are present on the device, the RESET pin
being active HIGH and RESET pin being active LOW. Only
one of these inputs need be connected in the system as
they are ORed internally to the device and each pin has
the necessary pull-down (for RESET) and pull-up (for
RESET) resistors at the pad.
An automatic reset can be obtained when VDD is switched
on by connecting the RESET pin to VDDP through a 10 F
capacitor, providing the VDD rise time does not exceed
1 ms, and the oscillator start-up time does not exceed
10 ms.
Alternatively, a capacitor connected to VSSP with a suitable
pull-up to VDDP, (e.g. 10 F capacitor; 16 k resistor) can
be connected to the RESET pin.
To ensure correct initialisation, the RESET/RESET pin
must be held HIGH/LOW long enough for the oscillator to
settle following power-up, usually a few milliseconds
(application specific, typically 10 ms). Once the oscillator
is stable, a further 24 crystal clocks are required to
generate the reset. Once the above reset condition has
been detected, an internal reset signal is triggered (which
remains active for 2048 clock cycles).
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