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參數(shù)資料
| 型號： | SAA5667HL/NNNN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 108/112頁 |
| 文件大?。?/td> | 537K |
| 代理商： | SAA5667HL/NNNN |
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2004 Sep 03
95
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
SMTH
smoothing on, on Page A (logic 1)
RANGE1 to RANGE0
additional two bits for display vertical offset
RANGEB1 to RANGEB0
additional two bits for display vertical offset on Page B
REGISTER
FUNCTION
25 IN-SYSTEM PROGRAMMING INTERFACE
A serial programming interface is available for late OTP
programming. The interface is based on the IEEE1149
(JTAG) standard, but only two instructions are utilized.
Table 42 shows which port pins are used for ISP.
Care should be taken during system design to ensure the
pins used for serial programming do not cause conflict with
the application circuit. It is advised to dedicate the port pins
(P2.1, P2.2, P2.3 and P2.4) to ISP, and not use them in
application.
However, if it is necessary to use them in application then
they must be assigned as output.
The device is placed in ISP mode using the RESET pin.
Pin P0.2 must be held HIGH during ISP mode. Power to
the device during ISP may be sourced either from the
application or from an external source. Ground reference
between the programmer and the target should be
common.
For further details, refer to the “In-System Programming
Application Note SPG/AN01008”.
Table 42 Port pins used for ISP
26 LIMITING VALUES
In accordance with Absolute Maximum Rating System (IEC 60134).
Note
1. For 5 V tolerant I/Os, the maximum value may be 6 V only when VDD is present.
PIN
NAME
FUNCTION
P2.0
EN
Enables JTAG operations (specic to SAA56xx)
P2.1
TCK
Test clock
P2.2
TMS
Test Mode Select
P2.3
TDI
Test Data In
P2.4
TDO
Test Data Out
VPE
9 V Programming Voltage
RESET
Device reset/mode selection
RESET (alternative) RESET
Device reset/mode selection
XTALIN
CLK
Clock 12 MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDDX
supply voltage (all supplies)
0.5
+4.0
V
VI
input voltage (any input)
note 1
0.5
(VDD + 0.5) or 4.1 V
VO
output voltage (any output)
0.5
VDD + 0.5
V
IO
output current (each output)
10
mA
IIOK
DC input or output diode current
20
mA
Tj
operating junction temperature
20
+125
°C
Tstg
storage temperature
55
+125
°C
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