參數(shù)資料
型號： SAA5667HL/NNNN
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100
文件頁數(shù)： 32/112頁
文件大小： 537K
代理商： SAA5667HL/NNNN
2004 Sep 03
26
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
Timer/counter Mode Control (TMOD)
GATE
gating control Timer/counter 1
C/T
Counter/Timer 1 selector
M1 to M0
mode control bits Timer/counter 1; M<1:0>:
00 = 8-bit Timer or 8-bit Counter with divide-by-32 prescaler
01 = 16-bit time interval or event Counter
10 = 8-bit time interval or event Counter with automatic reload upon overflow;
reload value stored in TH1
11 = stopped
GATE
gating control Timer/counter 0
C/T
Counter/Timer 0 selector
M1 to M0
mode control bits Timer/counter 0; M<1:0>:
00 = 8-bit timer or 8-bit counter with divide-by-32 prescaler
01 = 16-bit time interval or event Counter
10 = 8-bit time interval or event Counter with automatic reload upon overflow;
reload value stored in TH0
11 = one 8-bit time interval or event Counter and one 8-bit time interval Counter
Timer 2 Mode Control (T2MOD)
T2RD
Timer 2 Read ag. This bit is set by hardware if following TL2 read and before
TH2 read, TH2 is incremented. It is reset on the trailing edge of next TL2 read.
T2OE
Timer 2 output enable bit. When set, pin T2 is congured as a clock output.
DCEN
Down count enable ag. When set, this allows Timer 2 to be congured as an
up/down Counter.
Text Register 0 (TXT0)
X24 POSN
store packet 24 in extension packet memory (logic 0) or page memory (logic 1)
DISPLAY X24
display X24 from page memory (logic 0) or extension packet memory (logic 1)
AUTO FRAME
FRAME output switched off automatically if any video displayed (logic 1)
DISABLE HEADER ROLL
disable writing of rolling headers and time into memory (logic 1)
DISPLAY STATUS ROW ONLY
display row 24 only (logic 1)
DISABLE FRAME
FRAME output always LOW (logic 1)
VPS ON
enable capture of VPS data (logic 1)
INV ON
enable capture of inventory page in block 8 (logic 1)
Text Register 1 (TXT1)
EXT PKT OFF
disable acquisition of extension packets (logic 1)
8-BIT
disable checking of packets 0 to 24 written into memory (logic 1)
ACQ OFF
disable writing of data into Display memory (logic 1)
X26 OFF
disable automatic processing of X/26 data (logic 1)
FULL FIELD
acquire data on any TV line (logic 1)
FIELD POLARITY
VSYNC pulse in second half of line during even eld (logic 1)
H POLARITY
HSYNC reference edge is negative going (logic 1)
BITS
FUNCTION
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