參數(shù)資料
型號(hào)： SAA5667HL/NNNN
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100
文件頁數(shù)： 40/112頁
文件大?。?/td> 537K
代理商： SAA5667HL/NNNN
2004 Sep 03
33
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
DISPLAY X24 B
display row 24 from basic page memory on display Page B (logic 0)
display row 24 from appropriate location in extension memory on display Page B
(logic 1)
DISPLAY STATUS ROW ONLY B
display only row 24 on display Page B (logic 1)
Text Register 31 (TXT31)
GPF11 to GPF10
general purpose register, bits dened by mask programmable location
(Character ROM address 09FEH)
GPF9 to GPF8
00 = reserved
01 = 80C51 configured for 12 MHz operation
10 = reserved
11 = reserved
Text Register 32 (TXT32)
9FE11
reserved
9FF11 to 9FF5
mask programmable bits available for UOC conguration (Character ROM
address 09FFH)
Text Register 33 (TXT33)
BFE7 to BFE0
mask programmable bits available for UOC conguration (Character ROM
address 0BFEH)
Text Register 34 (TXT34)
BFE11 to BFE8
mask programmable bits available for UOC conguration (Character ROM
address 0BFEH)
Text Register 35 (TXT35)
PKT1-24<7:0>
Teletext Packets 1-24 received for blocks 7 to 0, set by hardware and cleared by
software. Teletext Packets 1-24 received after a header in any one Vertical
Blanking Interval (VBI) (logic 1)
Text Register 36 (TXT36)
PKT1-24<9:8>
Teletext Packets 1-24 received for blocks 9 to 8, set by hardware and cleared by
software. Teletext Packets 1-24 received after a header in any one VBI (logic 1)
Watchdog Timer (WDT)
WDV7 to WDV0
Watchdog Timer period
Watchdog Timer Key (WDTKEY)
WKEY7 to WKEY0(5)
Watchdog Timer key
Wide Screen Signalling 1 (WSS1)
WSS<3:0> ERROR
error in WSS<3:0> (logic 1)
WSS3 to WSS0
signalling bits to dene aspect ratio (group 1)
BITS
FUNCTION
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