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參數(shù)資料
| 型號(hào)： | RB5C396 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2 |
| 中文描述： | PCMCIA BUS CONTROLLER, PBGA256 |
| 封裝： | 23 X 23 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 70/93頁 |
| 文件大?。?/td> | 449K |
| 代理商： | RB5C396 |
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RF5C296/RF5C396L/RB5C396/RF5C396
66
The CD1# and CD2# pins are grounded within the PC card and pulled up on the PC card slot. Both the CD1#
and CD2# pins are caused to transition to “L” upon insertion of the PC card into the PC card slot. Note that some of
the internal registers are designed to control the CD1# and CD2# pins upon occurrence of both the CD1# and CD2#
status change and others upon occurrence of either the CD1# or CD2# status change.
· Interface Status Register (Index : 01h) : bit3 (for the CD2# pin) and bit2 ( for the CD1# pin)
These bits can be used to specify reading back of the CD1# and CD2# pin inputs.
· Card Status Change Register (Index : 04h) : bit3 (Card Detect Change bit)
This bit will be set to “1” upon occurrence of either the CD1# or CD2# pin status change (insertion or
removal of the PC card into or from the PC card slot).
· Card Status Interrupt Configuration Register (Index : 05h) : bit3 (Card Detect Enable bit)
This bit can be used to specify generation of interrupts from the IRQn pins or the INTR# pin upon occurrence
of either the CD1# or CD2# pin status change.
· Card Detect and General Control Register (Index : 16h) : bit4 (Card Detect Resume Enable bit)
This bit can be used to specify generation of interrupts from the RI_OUT# pin upon occurrence of either the
CD1# or CD2# pin status change.
· Card Detect and General Control Register (Index : 16h) : bit5 (Software Card Detect Interrupt bit)
This bit can be set to “1” to specify software-controlled generation of interrupts derived from the CD1#
and/orCD2# pin status change.
· Card Detect and General Control Register (Index : 16h) : bit1 (Configuration Reset Enable bit)
This bit can be set to “1” to specify generation of reset pulses upon transition of both the CD1# and CD2# pins
to “H” (removal of the PC card from the PC card slot), thus resetting the internal registers relating to address
windows or interrupts. (For details on the internal registers thus reset, see “1. Chip Control” in “INTERNAL
REGISTERS”.)
5.1 CD1# and CD2# Pins
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