參數(shù)資料
型號(hào)： RB5C396
廠商： RICOH COMPANY LTD
元件分類： 總線控制器
英文描述： PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2
中文描述： PCMCIA BUS CONTROLLER, PBGA256
封裝： 23 X 23 MM, PLASTIC, BGA-256
文件頁數(shù)： 25/93頁
文件大?。?/td> 449K
代理商： RB5C396
RF5C296/RF5C396L/RB5C396/RF5C396
21
To prevent any conflict between interrupt request signals derived from the RF5C296 or the RF5C396 and from
any other device, the PC card status change, such as fluctuations in the voltage of the battery for the PC card and
insertion or removal of the PC card into or from the PC card slot, as well as interrupt request signals (IREQ#)
derived from the I/O cards can be assigned to one of the ten interrupt lines for ten interrupt request signals (IRQ15,
IRQ14, IRQ12, IRQ11, IRQ10, IRQ9, IRQ7, IRQ5, IRQ4, and IRQ3).
These interrupt requests are programmable to the level mode or the edge trigger mode.
In addition to steering IRQn output, INTR# output is also used as an interrupt output. The INTR# pin signal is
normally input to the EXTSMI# pin of the Intel 386SL to output a low-level pulse having three times the width of the
SYSCLK pulse at the time of interrupt request generation and a high-level pulse at any other time.
In addition to these interrupts sources, it is programmable that IRQs will be generated when the transition
occurs on GPI (General Purpose Input).
If card status change while other card status change interrupt request, second interrupt request pulse is not gen-
erated. In this case, the appropriate bit must be set to “1” in the Card Status Change Register (Index : 04h) in the
Explicit Write Back Acknowledge Mode to enable interrupt request recognition by the host system interrupt pro-
cessing routine. Upon interrupt request recognition, the bit is reset to “0”.
Incidentally, all the bits in the Card Status Change Register (Index : 04h) are reset to “0” when it is read in any
other mode than the Explicit Write Back Acknowledge Mode.
IRQ9, IRQ10, IRQ12, IRQ11 (or IRQ15) are multi-function pins. In PCMCIA-ATA mode, IRQ12 can drive LED. In
DMA mode, IRQ9, IRQ10, IRQ11 (or IRQ15) work as DACK#, DREQ, TC.
In addition to 16bit bus cycle, RF5C296/RF5C396 supports 8bit bus cycle. The 8bit bus cycle to a PC Card can be
generated even when the window is configured for 16bit. This means that the combination of SBHE# input and SA0
input override the data size configuration. On 8bit host systems, the SBHE# input must be pulled high (inactive) for
proper operation. The following is a truth table of the card enable logic.
4. Address Mapping
5. Bus Sizing
16bit Window
SBHE#
A0
CE2#
CE1#
YES
L
L
L
L
YES
L
H
L
H
YES
H
L
H
L
YES
H
H
H
L
NO
L
L
H
L
NO
L
H
H
L
NO
H
L
H
L
NO
H
H
H
L
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