參數(shù)資料
型號: RB5C396
廠商: RICOH COMPANY LTD
元件分類: 總線控制器
英文描述: PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2
中文描述: PCMCIA BUS CONTROLLER, PBGA256
封裝: 23 X 23 MM, PLASTIC, BGA-256
文件頁數(shù): 22/93頁
文件大?。?/td> 449K
代理商: RB5C396
RF5C296/RF5C396L/RB5C396/RF5C396
18
RF5C296 (RF5C396) is a controller for supporting one (two) card slot compliant to PCMCIA2.1/JEIDA4.2 68pin
standard. Direct connection to the card slot is allowed due to the complete buffering of signals to the card.
RF5C296/RF5C396 can also interface directly to the ISA bus.
FUNCTIONAL DESCRIPTION
Each socket has five independently enabled and controlled system memory address mapping windows and two
independently enabled and controlled system I/O address mapping windows.
Some portions of 64MB common memory and 64MB attribute memory spaces on the PC Cards can be mapped
into the smaller 16MB ISA address space.
Mapping of each system memory window can start and stop on any 4kB boundary of ISA system memory above
64kB except for I/O address space of 0000h to 0FFFFh by setting the system memory mapping start register, sys-
tem memory mapping stop register, and card memory offset register. The summation result (in 2's complement) of
the value in the card memory offset register and ISA system address value will result in the memory card address.
Each window has independent control of data bus size, the number of wait cycles, and the selection of common
memory area or attribute memory area.
Each I/O window can be mapped with 1byte resolution between 0000h to 0FFFFh in the ISA system address
space by setting the I/O start address register and the I/O stop address register. I/O mapping is not allowed during
the DMA cycle.
PCMCIA Socket Memory
Address Space
ISA Memory
Address Space
System Memory Window:
Memory Map End Address
D000:FFFFh
Memory Map Start Address
D000:0000h
Mapping
3FF FFFFh=64MB
Resulting PCMCIA
Socket Memory Window:
End Address
000 FFFFh
Start Address
000 0000h
Memory Map Address
Offset=3F30XXXh
=–00D0000h(two's complement when negative offset)
1. Address Mapping
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