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參數(shù)資料
| 型號： | RB5C396 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2 |
| 中文描述： | PCMCIA BUS CONTROLLER, PBGA256 |
| 封裝： | 23 X 23 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 39/93頁 |
| 文件大小： | 449K |
| 代理商： | RB5C396 |
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RF5C296/RF5C396L/RB5C396/RF5C396
35
Index : 05h
Default value : 0000 0000b
Read & Write
bit7 to bit4 : These bits select the redirection of the card status change interrupt if the interrupt is not selected to
INTR# pin.
INTR# Enable bit
0
0
0
0
0
0
0
0
0
0
0
1
bit3
0
0
0
0
0
1
1
1
1
1
1
′
bit2
0
0
1
1
1
0
0
0
1
1
1
′
bit1
0
1
0
0
1
0
1
1
0
1
1
′
bit0
0
1
0
1
1
1
0
1
0
0
1
′
IRQn Selection
IRQ not Selected
IRQ3 Enabled
IRQ4 Enabled
IRQ5 Enabled
IRQ7 Enabled
IRQ9 Enabled
IRQ10 Enabled
IRQ11 Enabled
IRQ12 Enabled
IRQ14 Enabled
IRQ15 Enabled
redirected to INTR#
bit3
: Card Detect Enable. Setting bit to “1” enables a card status change interrupt when a change has been
detected on CD1# or CD2# signals.
: Ready Enable. Setting this bit to “1” enables a card status change interrupt when a “L” to “H” transition
has been detected on READY/BUSY# signals. This bit is ignored when interface is configured for I/O
card.
: Battery Warning Enable. Setting this bit to “1” enables a card status change interrupt when battery
warning condition has been detected. This bit is ignored when interface is configured for I/O card.
: Battery Dead Enable. For memory cards, Setting this bit to “1” enables a card status change interrupt
when a battery dead condition has been detected. For I/O cards, a card status change interrupt will be
generated if the STSCHG#/RI# has been pulled “L” assuming Ring Indicate Enable Bit (bit7) in
Interrupt and General Control Register is set to “0”.
bit2
bit1
bit0
1.9 Card Status Interrupt Configuration Register
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