參數(shù)資料
型號(hào)： RB5C396
廠商： RICOH COMPANY LTD
元件分類： 總線控制器
英文描述： PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2
中文描述： PCMCIA BUS CONTROLLER, PBGA256
封裝： 23 X 23 MM, PLASTIC, BGA-256
文件頁數(shù)： 58/93頁
文件大小： 449K
代理商： RB5C396
RF5C296/RF5C396L/RB5C396/RF5C396
54
SOFTWARE DESIGN CONSIDERATIONS
The RF5C296 and the RF5C396 contains about fifty 8bit internal registers. One of these internal registers, the
Identification and Revision Register (Index : 00h), which is intended for only reading operation and fixed at 83h, is
useful for confirming access to the other internal registers.
One of the initial requirements in inserting the PC card is to identify whether it is the I/O card or the memory
card. Such PC card types can be identified by bit5 in the Interrupt and General Control Register (Index : 03h). This
bit indicates the I/0 card and the memory card when set to “1” and “0” , respectively.
The RF5C296 and the RF5C396 are designed to interface between the CPU bus, such as the ISA bus, and the PC
card bus. Unlike ordinary ICs, therefore, these ICs provides address mapping mainly to establish a correspondence
between the CPU bus and the PC card bus.
In view of such differences, therefore, this section provides separate description of “I/O address mapping” and
“memory address mapping”.
2. Identification of PC Card Types
3. Address Mapping and Address Window Setting
The I/O address space occupies 64kB ranging from “0000h” to “0FFFFh” on the ISA bus. Similarly, the I/O
address space occupies 64kB ranging from “0000h” to “0FFFFh” on the PC card bus, too.
The RF5C296 is capable of mapping any given two I/O address windows (ranges) on the ISA bus to the I/O
address windows on the PC card bus in units of 1 bytes for each PC card slot in such a manner as to ensure address
matching between the ISA bus and the PC card bus.
An I/O address window can be set by setting the low-order 8bits of its starting address in the I/O Address n
Start Low Byte Register (Index : 08h (I/O Window 0) and 0Ch (I/O Window 1)) and the high-order 8bits in the I/O
Address n Start High Byte Register (Index : 09h (I/O Window 0) and 0Dh (I/O Window 1)) while setting the low-
order 8bits of its ending address in the I/O Address n Stop Low Byte Register (Index : 0Ah (I/O Window 0) and
0Eh (I/O Window 1)) and the high-order 8bits in the I/O Address n Stop High Byte Register (Index : 0Bh (I/O
Window 0) and 0Fh (I/O Window 1)).
1. Confirmation of Access to Internal Registers
3.1 I/O Address Space
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