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參數(shù)資料
| 型號： | RB5C396 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2 |
| 中文描述： | PCMCIA BUS CONTROLLER, PBGA256 |
| 封裝： | 23 X 23 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 37/93頁 |
| 文件大?。?/td> | 449K |
| 代理商： | RB5C396 |
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RF5C296/RF5C396L/RB5C396/RF5C396
33
Index : 06h
Default value : 0000 0000b
Read & Write
bit7 : I/O Window 1 Enable. If this bit is set to “0”, an I/O access within the I/O address Window 1 will inhibit the
card enable signal.
bit6 : I/O Window 0 Enable. If this bit is set to “0”, an I/O access within the I/O address Window 0 will inhibit the
card enable signal.
bit5 : MEMCS16# Decode A23 to A12. If this bit is set to “0”, MEMCS16# is generated from a decode of A23 to A17.
If this bit is set to “1”, MEMCS16# is generated from a decode of A23 to A12. The MEMCS16# pin signal is out-
put within any specified address range whether the PC card is the memory card or the I/O card.
bit4 : Memory Window 4 Enable Bit. If this Bit is set to “0”, a memory access within the Memory Window 4 will
inhibit the card enable signal.
bit3 : Memory Window 3 Enable Bit. If this Bit is set to “0”, a memory access within the Memory Window 3 will
inhibit the card enable signal.
bit2 : Memory Window 2 Enable Bit. If this Bit is set to “0”, a memory access within the Memory Window 2 will
inhibit the card enable signal.
bit1 : Memory Window 1 Enable Bit. If this Bit is set to “0”, a memory access within the Memory Window 1 will
inhibit the card enable signal.
bit0 : Memory Window 0 Enable Bit. If this Bit is set to “0”, a memory access within the Memory Window 0 will
inhibit the card enable signal.
1.7 Address Window Enable Register
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