參數(shù)資料
型號： RB5C396
廠商： RICOH COMPANY LTD
元件分類： 總線控制器
英文描述： PC Card Controller compliant with PCMCIA 2.1/JEIDA 4.2
中文描述： PCMCIA BUS CONTROLLER, PBGA256
封裝： 23 X 23 MM, PLASTIC, BGA-256
文件頁數(shù)： 34/93頁
文件大?。?/td> 449K
代理商： RB5C396
RF5C296/RF5C396L/RB5C396/RF5C396
30
The Card Status Change Register contains the status for sources of the card status change interrupt.
These sources can be enabled to generate a card status change interrupt by setting the corresponding bit in the
Card Status Change Interrupt Configuration Register. There are two ways to reset this register,
(1) Read Card Status Change Register
(2) Write back “1” into the corresponding bit in the Card Status Change Register after setting Explicit Write Back
Card Status Change Acknowledge bit to “1” in the Global Control Register.
Index : 16h
Default value : 0000 0000b
Read & Write
bit7 to bit6 : Reserved
bit5
: Software Card Detect Interrupt. If the Card Detect Enable bit is set to “1” in the Card Status Change
Interrupt Configuration Register, then writing “1” to the Software Card Detect bit in the Card Detect
and General Control Register will cause a card detect and status change interrupt. The functionality
and acknowledgement of this software interrupt will work the same way as the hardware generated
interrupt. This bit is always read as “0”.
: Card Detect Resume Enable. When this bit is set to “1”, and once a card detect change has been detect-
ed on the CD1# and CD2# inputs, RI-OUT# output will go “High” to “Low” and bit3 of Card Status
Change Register will be set to “1”. The RI_OUT# pin signal is held at “0” until bit3 is reset to “0” in the
and Status Change Register. The RI_OUT# pin signal is not generated up on and detection unless the
card detection enable bit is first set to “1” in the Card Status Interrupt Configuration Register (Index :
05h). If the card status change is routed to either the INTR# and any of IRQn signals, the setting of this
bit to “1” will prevent INTR# and IRQn signal becoming active as a result of card status change.
: GPI Transition Control. Default value is “0”.
If this bit is set to “0”, a card status change interrupt will be generated when GPI# input goes “H” to “L”.
If this bit is set to “1”, a card status change interrupt will be generated when GPI# input goes “L” to “H”.
: GPI Enable. If this bit is set to “1”, a card status change interrupt will be generated when GPI# input
changes.
: Configuration Reset Enable. If this bit is set to “1”, a reset pulse will be generated when both CD1# and
CD2# goes “L” to “H”. This reset pulse reset the following registers.
bit4
bit3
bit2
bit1
1.5 Card Detect and General Control Register
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