參數(shù)資料
型號(hào): PSD913F1V
英文描述: 130V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a SMD-2 package; A IRHNA57163SE with Standard Packaging
中文描述: Flash在系統(tǒng)可編程微控制器外設(shè)
文件頁(yè)數(shù): 6/94頁(yè)
文件大小: 463K
代理商: PSD913F1V
Preliminary
PSD913F1
5
3.0
General
Information
The PSD913F1 series architecture allows In-System Programming of all Memory, PLD
Logic and Device Configuration.The devices eliminate the need for discrete ‘glue’ logic, and
allow the development of entire systems using only a few highly integrated devices.
4.0
PSD913F1
Family
All PSD913F1 devices provide these base features: 1 Mbit main Flash Memory, JTAG port,
GPLD, DPLD, power management, and 27 I/O pins. The PSD913F1 also adds 64 bytes of
OTP memory for any use (product serial number, calibration constants, etc.). Once written,
the OTP memory can never be altered.
The following table summarizes the PSD913F1:
Part #
Flash
Additional
Memory for
Boot and/or Data
(4 Sectors)
No. of
GPLD
Output
Serial ISP
JTAG/ISC
Port
Main Memory
Kbit
(8 Sectors)
PSD913F1
Family
I/O
Pins
SRAM
Kbit
Turbo
Mode
Supply
Voltage
Device
PSD913F1
PSD913F1
27
19
Yes
1024
256 Kbit EEPROM
16
Yes
5V
PSD913F1V
PSD913F1V
27
19
Yes
1024
256 Kbit EEPROM
16
Yes
3V
Table 1. PSD913F1 Product Matrix
相關(guān)PDF資料
PDF描述
PSD913F2 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads
PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging
PSD913F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
PSD934F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
PSD913F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
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