參數(shù)資料
型號： PSD913F1V
英文描述： 130V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a SMD-2 package; A IRHNA57163SE with Standard Packaging
中文描述： Flash在系統(tǒng)可編程微控制器外設(shè)
文件頁數(shù)： 40/94頁
文件大小： 463K
代理商： PSD913F1V
Preliminary
PSD913F1
The
PSD913F1
Functional
Blocks
(cont.)
39
9.3.3 Microcontroller Interface Examples
Figures 16 through 20 show examples of the basic connections between the PSD913F1
and some popular microcontrollers. The PSD913F1 Control input pins are labeled as to the
microcontroller function for which they are configured. The MCU interface is specified using
the PSDsoft.
9.3.3.1 80C31
Figure 16 shows the interface to the 80C31, which has an 8-bit multiplexed address/data
bus. The lower address byte is multiplexed with the data bus. The microcontroller control
signals PSEN, RD, and WR may be used for accessing the internal memory components
and I/O Ports. The ALE input (pin PD0) latches the address.
9.3.3.2 80C251
The Intel 80C251 microcontroller features a user-configurable bus interface with four
possible bus configurations, as shown in Table 16.
Configuration 1 is 80C31 compatible, and the bus interface to the PSD913F1 is identical to
that shown in Figure 16. Configurations 2 and 3 have the same bus connection as shown in
Figure 17. There is only one read input (PSEN) connected to the Cntl1 pin on the
PSD913F1. The A16 connection to the PA0 pin allows for a larger address input to the
PSD913F1. Configuration 4 is shown in Figure 18. The RD signal is connected to Cntl1 and
the PSEN signal is connected to the CNTL2.
The 80C251 has two major operating modes: Page Mode and Non-Page Mode. In
Non-Page Mode, the data is multiplexed with the lower address byte, and ALE is active in
every bus cycle. In Page Mode, data D[7:0] is multiplexed with address A[15:8]. In a bus
cycle where there is a Page hit, the ALE signal is not active and only addresses A[7:0]
are changing. The PSD913F1 supports both modes. In Page Mode, the PSD bus timing
is identical to Non-Page Mode except the address hold time and setup time with respect
to ALE is not required. The PSD access time is measured from address A[7:0] valid to
data in valid.
相關(guān)PDF資料
PDF描述
PSD913F2 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads
PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging
PSD913F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD934F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD913F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD913F1V-12B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F1V-12B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F1V-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F1V-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F1V-12M 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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