參數(shù)資料
型號: PSD913F1V
英文描述: 130V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a SMD-2 package; A IRHNA57163SE with Standard Packaging
中文描述: Flash在系統(tǒng)可編程微控制器外設(shè)
文件頁數(shù): 15/94頁
文件大小: 463K
代理商: PSD913F1V
PSD913F1
Preliminary
14
Table 7 shows the offset addresses to the PSD913F1 registers relative to the CSIOP base
address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
internal PSD913F1 registers. Table 7 provides brief descriptions of the registers in CSIOP
space. For a more detailed description, refer to section 9.
Table 7. Register Address Offset
8.0
PSD913F1
Register
Description
and Address
Offset
Register Name
Port A Port B Port C Port D Other*
Description
Data In
00
01
10
11
Reads Port pin as input,
MCU I/O input mode
Control
02
03
Selects mode between
MCU I/O or Address Out
Stores data for output
to Port pins, MCU I/O
output mode
Data Out
04
05
12
13
Direction
06
07
14
15
Configures Port pin as
input or output
Configures Port pins as
either CMOS or Open
Drain on some pins, while
selecting high slew rate
on other pins.
Drive Select
08
09
16
17
Flash Protection
C0
Read only – Flash Sector
Protection
PSD/EE
Protection
Read only – PSD Security
and EEPROM Sector
Protection
C2
PMMR0
B0
Power Management
Register 0
PMMR2
B4
Power Management
Register 2
Page
E0
Page Register
Places PSD memory
areas in Program and/or
Data space on an
individual basis.
VM
E2
*
Other registers that are not part of the I/O ports.
相關(guān)PDF資料
PDF描述
PSD913F2 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads
PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging
PSD913F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD934F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD913F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
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