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CHAPTER 7 16-BIT TIMER/EVENT COUNTER
User
’
s Manual U15017EJ2V0UD
Caution In Figure 7-14, for simplification purposes, consideration of the delay caused by noise elimination
has been omitted from the timing of the capture operation based on the inputs to pins TI00 and
TI01 and of interrupt request occurrence. For accurate information, refer to Figure 7-13 (which
shows the CR01 capture operation with a rising edge specified).
(3) Pulse width measurement with free-running counter and two capture registers
When 16-bit timer counter 0 (TM0) is used as a free-running counter (refer to the register settings in
Figure 7-
15
), the pulse width of the signal input to the TI00/P20 pin can be measured.
When the edge specified by bits 4 and 5 (ES00 and ES01) of prescaler mode register 0 (PRM0) is input to the
TI00/P20 pin, the value of TM0 is loaded to 16-bit capture/compare register 01 (CR01), and an external interrupt
request signal (INTTM01) is set.
The value of TM0 is also loaded to 16-bit capture/compare register 00 (CR00) when an edge reverse to the one
that triggers capturing to CR01 is input.
For the edge of the TI00/P20 pin, the rising or falling edge can be specified.
Sampling is performed with the count clock selected by PRM0, and the capture operation is performed when the
valid level of the TI00/P20 pin is detected two times. Therefore, noise with a short pulse width can be eliminated.
Caution If the valid edge of the TI00/P20 pin is specified to be both the rising and falling edges, CR00
cannot perform its capture operation.
Figure 7-15. Control Register Settings for Pulse Width Measurement
with Free-Running Counter and Two Capture Registers
(a) 16-bit timer mode control register 0 (TMC0)
(b) Capture/compare control register 0 (CRC0)
0
0
0
0
TMC03
0
TMC02
1
0
OVF0
0
TMC0
Free-running mode
0
0
0
0
0
CRC02
1
CRC01
1
CRC00
1
CRC0
CR00 as capture register
Captures to CR00 at edge reverse to valid
edge of TI00/P20 pin.
CR01 as capture register