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CHAPTER 7 16-BIT TIMER/EVENT COUNTER
User
’
s Manual U15017EJ2V0UD
(1) 16-bit timer counter 0 (TM0)
TM0 is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of an input clock. If the count value is read
during operation, input of the count clock is temporarily stopped, and the count value at that point is read. The
count value is reset to 0000H in the following cases:
<1>
<2>
<3>
<4>
RESET is input.
TMC03 and TMC02 are cleared.
Valid edge of TI00 is input in the clear & start mode by inputting valid edge of TI00.
TM0 and CR00 match with each other in the clear & start mode on match between TM0 and CR00.
(2) 16-bit capture/compare register 00 (CR00)
CR00 is a 16-bit register that functions as a capture register and as a compare register. Whether this register
functions as a capture or compare register is specified by using bit 0 (CRC00) of capture/compare control register
0.
When using CR00 as compare register
The value set to CR00 is always compared with the count value of 16-bit timer counter 0 (TM0). When the
values of the two match, an interrupt request (INTTM00) is generated. When TM0 is used as an interval timer,
CR00 can also be used as a register that holds the interval time.
When using CR00 as capture register
The valid edge of the TI00 or TIO51 pin can be selected as a capture trigger. The valid edges of TI00 and
TIO51 are set by prescaler mode register 0 (PRM0).
Tables 7-2 and 7-3 show the valid edges of the TI00 pin and the valid edges of the TIO51 pin that apply when
capture triggers are specified.
Table 7-2. Valid Edge of TI00 Pin and Valid Edge of Capture Trigger of CR00
ES01
ES00
Valid Edge of TI00 Pin
Capture Trigger of CR00
0
0
Falling edge
Rising edge
0
1
Rising edge
Falling edge
1
0
Setting prohibited
Setting prohibited
1
1
Both rising and falling edges
No capture operation