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CHAPTER 12 A/D CONVERTER
User
’
s Manual U14701EJ3V0UD
12.2 A/D Converter Configuration
The A/D converter consists of the following hardware.
Table 12-1. A/D Converter Configuration
Item
Configuration
Analog input
10 channels (ANI0 to ANI9)
Registers
Successive approximation register (SAR)
A/D conversion result register 0 (ADCR0)
Control registers
A/D converter mode register 0 (ADM0)
Analog input channel specification register 0 (ADS0)
External interrupt rising edge enable register (EGP)
External interrupt falling edge enable register (EGN)
(1) Successive approximation register (SAR)
This register compares the analog input voltage value to the voltage tap (compare voltage) value applied from
the series resistor string, and holds the result from the most significant bit (MSB).
When up to the least significant bit (LSB) is held (end of A/D conversion), the SAR contents are transferred to
A/D conversion result register 0 (ADCR0).
(2) A/D conversion result register 0 (ADCR0)
This is a 16-bit register which stores the A/D conversion results. The lower 6 bits are fixed to 0. Each time A/
D conversion ends, the conversion result is loaded from the successive approximation register.
ADCR0 is read by a 16-bit memory manipulation instruction.
RESET input sets the value of this register to 00H.
Symbol
ADCR0
Address After reset R/W
FF0EH,
FF0FH
0000H
R
FF0FH
FF0EH
0
0
0
0
0
0
Caution When writing is performed to A/D converter mode register 0 (ADM0) and analog input channel
specification register 0 (ADS0), the contents of ADCR0 may become undefined. Read the
conversion result following conversion completion before writing to ADM0, ADS0. Using a
timing other than the above may cause an incorrect conversion result to be read.
(3) Sample & hold circuit
The sample & hold circuit samples each analog input signal sequentially applied from the input circuit, and sends
it to the voltage comparator. This circuit holds the sampled analog input voltage value during A/D conversion.
(4) Voltage comparator
The voltage comparator compares the analog input to the series resistor string output voltage.
(5) Series resistor string
The series resistor string is connected between AV
REF0
and AV
SS0
, and generates a voltage to be compared to
the analog input.