18
User’s Manual U14701EJ3V0UD
LIST OF FIGURES (2/7)
Figure No.
Title
Page
5-1
Clock Generator Block Diagram...........................................................................................................
123
5-2
Subsystem Clock Feedback Resistor ..................................................................................................
124
5-3
Processor Clock Control Register (PCC) Format ................................................................................
125
5-4
External Circuit of Main System Clock Oscillator.................................................................................
126
5-5
External Circuit of Subsystem Clock Oscillator....................................................................................
127
5-6
Examples of Incorrect Resonator Connection .....................................................................................
128
5-7
Main System Clock Stop Function .......................................................................................................
132
5-8
System Clock and CPU Clock Switching .............................................................................................
135
6-1
16-Bit Timer/Event Counter 0 Block Diagram ......................................................................................
137
6-2
16-Bit Timer Mode Control Register 0 (TMC0) Format ........................................................................
141
6-3
Capture/Compare Control Register 0 (CRC0) Format.........................................................................
142
6-4
16-Bit Timer Output Control Register 0 (TOC0) Format ......................................................................
143
6-5
Prescaler Mode Register 0 (PRM0) Format.........................................................................................
144
6-6
Port Mode Register 3 (PM3) Format....................................................................................................
145
6-7
Control Register Settings for Interval Timer Operation ........................................................................
146
6-8
Interval Timer Configuration Diagram ..................................................................................................
147
6-9
Timing of Interval Timer Operation.......................................................................................................
147
6-10
Control Register Settings for PPG Output Operation...........................................................................
148
6-11
Control Register Settings for Pulse Width Measurement with Free-Running Counter
and One Capture Register ...................................................................................................................
149
6-12
Configuration Diagram for Pulse Width Measurement by Free-Running Counter................................
150
6-13
Timing of Pulse Width Measurement Operation by Free-Running Counter
and One Capture Register (with Both Edges Specified)......................................................................
150
6-14
Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter............
151
6-15
Capture Operation of CR01 with Rising Edge Specified......................................................................
152
6-16
Timing of Pulse Width Measurement Operation with Free-Running Counter
(with Both Edges Specified).................................................................................................................
152
6-17
Control Register Settings for Pulse Width Measurement with Free-Running Counter and
Two Capture Registers.........................................................................................................................
153
6-18
Timing of Pulse Width Measurement Operation by Free-Running Counter
and Two Capture Registers (with Rising Edge Specified)....................................................................
154
6-19
Control Register Settings for Pulse Width Measurement by Means of Restart ...................................
155
6-20
Timing of Pulse Width Measurement Operation by Means of Restart (with Rising Edge Specified) ...
155
6-21
Control Register Settings in External Event Counter Mode .................................................................
156
6-22
External Event Counter Configuration Diagram...................................................................................
157
6-23
External Event Counter Operation Timings (with Rising Edge Specified)............................................
157
6-24
Control Register Settings in Square-Wave Output Mode.....................................................................
158
6-25
Square-Wave Output Operation Timing ...............................................................................................
158
6-26
16-Bit Timer Counter 0 (TM0) Start Timing..........................................................................................
159