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CHAPTER 7 16-BIT TIMER/EVENT COUNTER 4
User
’
s Manual U14701EJ3V0UD
7.6 16-Bit Timer/Event Counter 4 Cautions
(1) Timer start errors
An error of up to one clock may occur in the time required for a match signal to be generated after timer start.
This is because 16-bit timer counter 4 (TM4) is started asynchronously to the count clock.
Figure 7-7. 16-Bit Timer Counter 4 (TM4) Start Timing
TM4 count value
0000H
0001H
0003H
Count clock
Timer start
0002H
(2) 16-bit timer compare register setting
Set other than 0000H to 16-bit timer compare register 4 (CR4). This means a 1-pulse count operation cannot
be performed when it is used as the event counter.
(3) Operation after compare register change during timer count operation
If the value after 16-bit timer compare register 4 (CR4) is changed is smaller than that of 16-bit timer counter
4 (TM4), TM4 continues counting, overflows and then restarts counting from 0. Thus, if the value (M) after the
CR4 change is smaller than that (N) before the change, it is necessary to reset and restart the timer after changing
CR4.
Figure 7-8. Timings After Change of Compare Register During Timer Count Operation
CR4
N
M
Count clock
TM4 count value
X
–
1
X
FFFFH
0000H
0001H
0002H
Remark
N > X > M
(4) Contending operations
If the match timing between the write period of 16-bit timer compare register 4 (CR4) and 16-bit timer counter
4 (TM4) conflicts, the match discriminant is not performed normally. Do not write any data to CR4 near the match
timing.
(5) Timer operation
Regardless of the CPU
’
s operation mode, when the timer stops, the input signal to pin TI4 is not acknowledged.