參數(shù)資料
型號: PCA5007
廠商: NXP Semiconductors N.V.
英文描述: Pager baseband controller
中文描述: 傳呼機基帶控制器
文件頁數(shù): 72/112頁
文件大小: 604K
代理商: PCA5007
1998 Oct 07
72
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
Table 61
Notation for data addressing modes
Table 62
Hexadecimal opcode cross reference
SYMBOL
DESCRIPTION
Rn
direct
@Ri
#data
#data 16
bit
addr16
working registers R0 to R7
128 internal RAM locations and any special function register (SFR)
indirect internal RAM location addressed by register R0 or R1
8-bit constant included in instruction
16-bit constant included as bytes 2 and 3 of instruction
direct addressed bit in internal RAM or SFR
16-bit destination address. Used by LCALL and LJMP. The branch will be anywhere within the 64-kbyte
program memory address space.
11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2-kbyte page
of program memory as the first byte of the following instruction.
Signed (two's complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is
128 to +127 bytes relative to first byte of the following instruction.
addr11
rel
SYMBOL
DESCRIPTION
*
8, 9, A, B, C, D, E and F.
11, 31, 51, 71, 91, B1, D1 and F1.
01, 21, 41, 61, 81, A1, C1 and E1.
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