參數(shù)資料
型號： PCA5007
廠商： NXP Semiconductors N.V.
英文描述： Pager baseband controller
中文描述： 傳呼機基帶控制器
文件頁數(shù)： 11/112頁
文件大?。?/td> 604K
代理商： PCA5007
1998 Oct 07
11
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
6.4
Memory organization
The PCA5007 has a program memory (OTP) plus data
memory (RAM) on-chip. The device has separate address
spaces for program and data memory (see Fig.4). If ports
P0 and P2 are not used as I/O signals these pins can be
used to address up to 64 kbytes of external program
memory. In this case, the CPU generates the latch signal
(ALE) for an external address latch and the read strobe
(PSEN) for external program memory. External data
memory is not supported.
6.4.1
P
ROGRAM MEMORY
After reset the CPU begins execution of the program
memory at location 0000H. The program memory can be
implemented in either internal OTP or external memory.
If the EA pin is strapped to V
DD
, then program memory
fetches are directed to the internal program memory. If the
EA pin is strapped to V
SS
, then program memory fetches
are directed to external memory.
Programming the on-chip OTP is detailed in Chapter 15.
Usually Philips will deliver programmed parts to a
customer. Supply of blank engineering samples is
possible, but then Philips cannot give any guarantee on
the programmability and retention of the program memory.
6.4.2
D
ATA MEMORY
The PCA5007 contains 1024 bytes of internal RAM
(consisting of 256 bytes standard RAM and 768 bytes
AUX-RAM) and Special Function Registers (SFRs).
Figure 4 shows the internal data memory space divided
into the lower 128 bytes the upper 128 bytes and the SFR
space and 768 bytes auxiliary RAM. Internal RAM
locations 0 to 127 are directly and indirectly addressable.
Internal RAM locations 128 to 255 are only indirectly
addressable. The SFR locations 128 to 255 are only
directly addressable and the auxiliary RAM is indirectly
addressable as external RAM (MOVX). External Data
Memory (EDM) is not supported.
6.4.3
S
PECIAL FUNCTION REGISTERS
The second 128 bytes are the address locations of the
special function registers. Table 1 shows the special
function registers space. The SFRs include the port
latches, timers, peripheral control, serial I/O registers, etc.
These registers can only be accessed by direct
addressing. There are 128 bit addressable locations in the
SFR address space (those SFRs whose addresses are
divisible by eight).
Fig.4 Memory map.
handbook, full pagewidth
MGR110
Internal RAM
INDIRECT AND
DIRECT
ADDRESSING
SFR space
External XRAM
is not supported
EXTERNAL
(EAN = 0)
INTERNAL
(EAN = 1)
EXTERNAL
INDIRECT
ADDRESSING
DIRECT
ADDRESSING
Internal XRAM
INDIRECT
ADDRESSING
WITH DPTR
INDIRECT
ADDRESSING
WITH Ri, DPTR
FFH
00H
0
7FH
80H
2FFH
000H
0FFH
100H
DATA MEMORY
PROGRAM MEMORY
4FFFH
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