參數(shù)資料
型號(hào)： P89V664FBC,557
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 61/90頁(yè)
文件大?。?/td> 0K
描述： IC 80C51 MCU FLASH 64K 44-TQFP
產(chǎn)品培訓(xùn)模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝： 800
系列： 89V
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 36
程序存儲(chǔ)器容量： 64KB（64K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 706 (CN2011-ZH PDF)
配用： 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱： 568-2437
935280835557
P89V664FBC
P89V660_662_664
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3.1 — 17 October 2011
64 of 90
NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
value in the module’s CCAPnL SFR the output will be low, when it is equal to or greater
than the output will be high. When CL overflows from FF to 00, CCAPnL is reloaded with
the value in CCAPnH. This allows updating the PWM without glitches. The PWM and
ECOM bits in the module’s CCAPMn register must be set to enable the PWM mode.
6.10.5 PCA watchdog timer
An on-board watchdog timer is available with the PCA to improve the reliability of the
system without increasing chip count. Watchdog timers are useful for systems that are
susceptible to noise, power glitches, or electrostatic discharge. Module 4 is the only PCA
module that can be programmed as a Watchdog. However, this module can still be used
for other modes if the Watchdog is not needed. Figure 31 shows a diagram of how the
Watchdog works. The user pre-loads a 16-bit value in the compare registers. Just like the
other compare modes, this 16-bit value is compared to the PCA timer value. If a match is
allowed to occur, an internal reset will be generated. This will not cause the RST pin to be
driven high.
user’s software then must periodically change (CCAP4H,CCAP4L) to keep a match from
occurring with the PCA timer (CH,CL). This code is given in the WATCHDOG routine
shown above.
In order to hold off the reset, the user has three options:
1. Periodically change the compare value so it will never match the PCA timer.
2. Periodically change the PCA timer value so it will never match the compare values.
3. Disable the Watchdog by clearing the WDTE bit before a match occurs and then
re-enable it.
The first two options are more reliable because the watchdog timer is never disabled as in
option #3. If the program counter ever goes astray, a match will eventually occur and
cause an internal reset. The second option is also not recommended if other PCA
modules are being used. Remember, the PCA timer is the time base for all modules;
changing the time base for other modules would not be a good idea. Thus, in most
applications the first solution is the best option.
;CALL the following WATCHDOG subroutine periodically.
CLR
EA
;Hold off interrupts
MOV
CCAP4L,#00
;Next compare value is within 255 counts of
current PCA timer value
MOV
CCAP4H,CH
SETB
EA
;Re-enable interrupts
RET
This routine should not be part of an interrupt service routine, because if the program
counter goes astray and gets stuck in an infinite loop, interrupts will still be serviced and
the Watchdog will keep getting reset. Thus, the purpose of the Watchdog would be
defeated. Instead, call this subroutine from the main program within 216 count of the PCA
timer.
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