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參數(shù)資料
| 型號： | P89V664FBC,557 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 40/90頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 64K 44-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 系列： | 89V |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 36 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 706 (CN2011-ZH PDF) |
| 配用： | 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP |
| 其它名稱： | 568-2437 935280835557 P89V664FBC |
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P89V660_662_664
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3.1 — 17 October 2011
45 of 90
NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
6.6.2 Auto-reload mode (up or down-counter)
In the 16-bit auto-reload mode, Timer 2 can be configured as either a timer or counter (via
C/T2 in T2CON), then programmed to count up or down. The counting direction is
determined by bit DCEN (Down-counter Enable) which is located in the T2MOD register
counting up. If the DCEN bit is set, Timer 2 can count up or down depending on the value
of the T2EX pin.
Figure 19 shows Timer 2 counting up automatically (DCEN = 0).
In this mode, there are two options selected by bit EXEN2 in T2CON register. If
EXEN2 = 0, then Timer 2 counts up to 0FFFFH and sets the TF2 (Overflow Flag) bit upon
overflow. This causes the Timer 2 registers to be reloaded with the 16-bit value in
RCAP2L and RCAP2H. The values in RCAP2L and RCAP2H are preset by software
means.
Auto reload frequency when Timer 2 is counting up can be determined from this formula:
(1)
Where SupplyFrequency is either fosc (C/T2 = 0) or frequency of signal on T2 pin
(C/T2 =1).
If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0
transition at input T2EX. This transition also sets the EXF2 bit. The Timer 2 interrupt, if
enabled, can be generated when either TF2 or EXF2 is ‘1’.
Microcontroller’s hardware will need three consecutive machine cycles in order to
recognize falling edge on T2EX and set EXF2 = 1: in the first machine cycle pin T2EX has
to be sampled as ‘1’; in the second machine cycle it has to be sampled as ‘0’, and in the
third machine cycle EXF2 will be set to ‘1’.
Fig 19. Timer 2 in Auto-reload mode (DCEN = 0)
002aaa524
OSC
÷6
T2 pin
C/T2 = 0
C/T2 = 1
TL2
(8-bits)
TH2
(8-bits)
TF2
control
reload
TR2
timer 2
interrupt
EXF2
RCAP2L RCAP2H
control
EXEN2
transition
detector
T2EX pin
SupplyFrequency
65536
RCAP2H RCAP2L
–
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