參數(shù)資料
型號(hào): OXCB950
廠商: Electronic Theatre Controls, Inc.
英文描述: Integrated High Performance UART Cardbus / PCI interface
中文描述: 綜合高性能的UART Cardbus / PCI接口
文件頁(yè)數(shù): 7/68頁(yè)
文件大?。?/td> 409K
代理商: OXCB950
4 P
IN
D
ESCRIPTIONS
Data Sheet Revision 1.1
Page 7
OXCB950
OXFORD SEMICONDUCTOR LTD.
Cardbus/PCI bus Pins
52, 53, 54, 57, 58, 60, 61, 66,
69, 73, 74, 75, 77, 78, 79, 100,
1, 3, 4, 5, 8, 9, 10, 11, 16, 17,
18, 19, 22, 23, 24, 25
67, 80, 99, 15
Dir
1
Name
AD[31:0]
Description
Multiplexed Address/Data bus.
C/P_I/O
C/P_I
C/BE[3:0]#
Multiplexed Command/Byte enable.
Systemclock
Cycle Frame
1
.
Device Select
Initiator ready
Target ready
Target Stop request
Parity
Systemerror
Parity error
Initialisation device select
For PCI applications this pin must be connected to the IDSEL
pin on the PCI connector. For cardbus applications, there is
no IDSEL signal, so this pin must be tied to Vdd (3.3v) via a
pull-up on the board. (10K recommended).
Systemreset
Interrupt Pin. For both cardbus and pci applications
Power management event signal, for Cardbus applications
This pin must be No-Connect (NC) for PCI applications
.
Power management event signal, for PCI applications
This pin must be No-Connect (NC) for cardbus applications
.
Slew rate control for cardbus/pci outputs
For cardbus applications, this must be tied to Vdd on the
board. For PCI applications, this must be tied to Gnd on the
board
.
88
83
93
84
85
95
98
72
96
68
CP_I
CP_I
CP_O
CP_I
CP_O
CP_O
CP_I/O
CP_O
CP_I/O
CP_I
CLK
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PAR
SERR#
PERR#
IDSEL
86
94
59
CP_I
CP_OD
CP_O
RST#
INTA# /CINT#
CSYSCHG
51
CP_OD
PME#
32
I
SLEW_RATE
1
For cardbus applications, the pin z_frame requires a pull-up (4k7) on the board. See PC Card Standard 7.0/7.1, section
5.3.3.3.3 “pull-up resistor requirements”.
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