- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384806 > OXCB950 (Electronic Theatre Controls, Inc.) Integrated High Performance UART Cardbus / PCI interface PDF資料下載
參數(shù)資料
| 型號(hào)： | OXCB950 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated High Performance UART Cardbus / PCI interface |
| 中文描述： | 綜合高性能的UART Cardbus / PCI接口 |
| 文件頁數(shù)： | 57/68頁 |
| 文件大?。?/td> | 409K |
| 代理商： | OXCB950 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當(dāng)前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
9 C
OMPLIANCE TO
PC C
ARD
S
TANDARDS
, 7.0
AND
7.1
Data Sheet Revision 1.0 PRELIMINARY
Page 57
OXCB950
OXFORD SEMICONDUCTOR LTD.
This section is relevant only to the cardbus application
of the OXCB950.
The OXCB950 requires the presence of the PCI_CLK for
reliable operation of the internal UART. Since the presence
of the pci clk is governed by the cardbus connector signal
CCLKRUN#, this connector pin must be kept asserted to
ensure the pci_clk is not stopped, for full functionality.
The
OXCB950 is, however, tolerant to fluctuations in the pci clk
line.
The cheapest option to maintain the pci_clk is to hold the
CCLKRUN#pin asserted through the use of a 1K0
The circuitry to implement the clock control logic on the
CCLKRUN#signal line is a synchronous 2bit shift register
(implemented via 2 D-type FF's) that utilises the logic
signal appearing on the CCLKRUN#line as DATA, as well
as driving the CCLKRUN#line through an open-collector
transistor. This arrangement creates a controlled loop from
the CCLKRUN# pin, through the logic, and back onto the
CCLKRUN#pin. The circuitry is enabled or disabled
pulldown resistor. This is compatible with PC Card
Standards 7.0, and all PC Card Standards prior to the
release of version 7.1.
PC Card Standard 7.1, however, does not allow the use of
this pulldown for new designs and all new designs that are
not tolerant to the clock stopping are required to implement
the clock run protocol on the CCLKRUN#line.
The clock run protocol can be implemented externally
through the use of the following circuitry and allows the
OXCB950 part to be compliant to version 7.1 of the PC
Card Standard.
through the use of the oxcb950's multi-purpose IO pin,
MIO0, that is controlled by Oxford Semconductor's custom
device-driver for the oxcb950 device.
When the oxcb950, with this modification, is inserted into
the PC cardbus slot then the clock control circuitry is
disabled by virtue of the pulldown connected on the MIO0
pin. This is because the state of the MIO0 pin following a
D
Q
CLR
74LV74 (so)
D
Q
CLR
74LV74 (so)
MIO0
CCLK
CCLKRUN#
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OXFW900 | IEEE1394 to ATA/ATAPI Native Bridge |
| OXFW900-TQ-A | IEEE1394 to ATA/ATAPI Native Bridge |
| OXFW911 | IEEE1394 to ATA/ATAPI Native Bridge |
| OXFW911-TQ-A | IEEE1394 to ATA/ATAPI Native Bridge |
| OZ6812 | ACPI CardBus Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OXCB950-TQAG | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 32 bit PC Card bridge to serial prt RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OXCB950-TQC60-A | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance UART Cardbus / 3.3v PCI interface |
| OXCF950 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:low cost asynchronous 16-bit PC card or Compact Flash UART device |
| OXCF950_06 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:low cost asynchronous 16-bit PC card or Compact Flash UART device |
| OXCF950B | 制造商:PLX 制造商全稱:PLX 功能描述:16-bit PC card/CF+ bridge to serial port |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。