參數(shù)資料
型號： OXCB950
廠商： Electronic Theatre Controls, Inc.
英文描述： Integrated High Performance UART Cardbus / PCI interface
中文描述： 綜合高性能的UART Cardbus / PCI接口
文件頁數(shù)： 24/68頁
文件大小： 409K
代理商： OXCB950
Data Sheet Revision 1.1
Page 24
OXCB950
OXFORD SEMICONDUCTOR LTD.
6.7
Cardbus Status Registers
The 4 32-bit cardbus status registers as defined by the tuple CISTPL_CONFIG_CB are detailed below. These are available
when the parameter
‘enable cardbus status registers’
has been enabled in the device’s local configuration register LCC. These
registers are relevant to the cardbus mode of the device and have no meaning for the pci mode of the device.
Function Event Register (offset +00 from BAR4)
This register returns the latched states of any internal power management events and internal interrupt/powerdown requests
(which would otherwise have set the device’ s interrupt pin and CSYSCHG pin if the corresponding fields in the Function Event
Mask Register are also set)
Reserved
15
Reserved
BIt0 - WP (Write Protect).
Not implemented. Returns 0.
Bit1 – Ready.
Not implemented. Returns 0.
BIt2 – Battery Voltage Detect 2 (BVD2).
Not implemented. Returns 0.
Bit3 – Battery Voltage Detect 1 (BVD1)
Not implemented. Returns 0.
Bit4 – General Wakeup (GWAKE)
Set when the corresponding field in the Function Present State register
Indicates an internal ‘wakeup (Power Management Event) event.
Cleared by Writing a “1” into this field. Writing ‘0’ has no effect.
Bit 15 – Interrupt (INTR)
Set when the corresponding field in the Function Present State register
indicates an internal interrupt/powerdown request.
Cleared by Writing a “1” into this field. Writing ‘0’ has no effect.
Function Event Mask Register (offset +04 from BAR4)
This register controls the assertion of the device’s interrupt pin and the CSYSCHG pin.
Reserved
15
14
Reserved
BIt0 - WP (Write Protect).
Not implemented. Returns 0.
Bit1 – Ready.
Not implemented. Returns 0.
BIt2 – Battery Voltage Detect 2 (BVD2).
Not implemented. Returns 0.
Bit3 – Battery Voltage Detect 1 (BVD1)
Not implemented. Returns 0.
Bit4 – General Wakeup (GWAKE)
Set according to the PME_En bit in the PCI power Management Registers.
Default value returns 0 (wakeups disabled)
Bit14 – Wakeup (WKUP)
Set according to the PME_En bit in the PCI power Management Registers
Default value returns 0 (wakeups disabled)
Bits 4, 14 collectively control the assertion of the power management event line
CSYSCHG when an internal wakeup request has been latched into the
GWAKE field in the function event register.
Bit 15 – Interrupt (INTR)
Interrupt Mask. Controls the assertion of the cardbus CINT#line when an
internal interrupt/powerdown request has been latched into the corresponding
field in the Function Event register. Default value is 0 (interrupts disabled)
4 3 2 1 0
4 3 2 1 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OXCB950-TQAG 功能描述:外圍驅(qū)動器與原件 - PCI 32 bit PC Card bridge to serial prt RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
OXCB950-TQC60-A 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance UART Cardbus / 3.3v PCI interface
OXCF950 制造商:OXFORD 制造商全稱:OXFORD 功能描述:low cost asynchronous 16-bit PC card or Compact Flash UART device
OXCF950_06 制造商:OXFORD 制造商全稱:OXFORD 功能描述:low cost asynchronous 16-bit PC card or Compact Flash UART device
OXCF950B 制造商:PLX 制造商全稱:PLX 功能描述:16-bit PC card/CF+ bridge to serial port
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