
7.7.2
7.8
7.8.1
7.8.2
7.9
7.9.1
7.9.2
7.9.3
7.9.4
7.10
7.10.1
7.10.2
7.10.3
7.10.4
7.10.5
7.11
7.11.1
7.11.2
7.11.3
7.11.4
7.11.5
7.11.6
7.11.7
7.11.8
7.11.9
7.11.10
7.11.11
7.11.12
7.11.13
7.11.14
7.11.15
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
9
10
11
11.1
11.2
11.3
12
12.1
12.2
13
Data Sheet Revision 1.1
Page 3
OXCB950
OXFORD SEMICONDUCTOR LTD.
MODEM STATUS REGISTER ‘MSR’.............................................................................................................................40
OTHER STANDARD REGISTERS.....................................................................................................................................40
DIVISOR LATCH REGISTERS ‘DLL & DLM.................................................................................................................40
SCRATCH PAD REGISTER ‘SPR’.................................................................................................................................40
AUTOMATIC FLOW CONTROL.........................................................................................................................................41
ENHANCED FEATURES REGISTER ‘EFR’...................................................................................................................41
SPECIAL CHARACTER DETECTION............................................................................................................................42
AUTOMATIC IN-BAND FLOW CONTROL.....................................................................................................................42
AUTOMATIC OUT-OF-BAND FLOW CONTROL...........................................................................................................42
BAUD RATE GENERATION...............................................................................................................................................43
GENERAL OPERATION.................................................................................................................................................43
CLOCK PRESCALER REGISTER ‘CPR’.......................................................................................................................43
TIMES CLOCK REGISTER ‘TCR’...................................................................................................................................43
EXTERNAL 1X CLOCK MODE.......................................................................................................................................45
CRYSTAL OSCILLATOR CIRCUIT................................................................................................................................45
ADDITIONAL FEATURES ..................................................................................................................................................45
ADDITIONAL STATUS REGISTER ‘ASR’......................................................................................................................45
FIFO FILL LEVELS ‘TFL & RFL’.....................................................................................................................................46
ADDITIONAL CONTROL REGISTER ‘ACR’..................................................................................................................46
TRANSMITTER TRIGGER LEVEL ‘TTL’........................................................................................................................47
RECEIVER INTERRUPT. TRIGGER LEVEL ‘RTL’........................................................................................................47
FLOW CONTROL LEVELS ‘FCL’ & ‘FCH’......................................................................................................................47
DEVICE IDENTIFICATION REGISTERS .......................................................................................................................47
CLOCK SELECT REGISTER ‘CKS’...............................................................................................................................48
NINE-BIT MODE REGISTER ‘NMR’...............................................................................................................................48
MODEM DISABLE MASK ‘MDM....................................................................................................................................49
READABLE FCR ‘RFC’...................................................................................................................................................49
GOOD-DATA STATUS REGISTER ‘GDS’ .....................................................................................................................49
DMA STATUS REGISTER ‘DMS’...................................................................................................................................50
PORT INDEX REGISTER ‘PIX’.......................................................................................................................................50
CLOCK ALTERATION REGISTER ‘CKA’.......................................................................................................................50
SERIAL EEPROMSPECIFICATION...........................................................................................51
EEPROM DATA ORGANISATION.....................................................................................................................................51
ZONE0: HEADER............................................................................................................................................................51
ZONE1 : POWER MANAGEMENT DATA, DATA_SCALE ZONE .................................................................................52
ZONE2: LOCAL CONFIGURATION REGISTER ZONE................................................................................................53
ZONE 3 : CARDBUS INFORMATION STRUCTURE.....................................................................................................53
ZONE4: PCI CONFIGURATION REGISTERS...............................................................................................................54
ZONE5: FUNCTION ACCESS........................................................................................................................................55
COMPLIANCE TO PC CARD STANDARDS, 7.0 AND 7.1............................................................57
OPERATING CONDITIONS.....................................................................................................60
DC ELECTRICAL CHARACTERISTICS ...................................................................................61
NORMAL 3.3V I/O BUFFERS.............................................................................................................................................61
5.0V TOLERANT I/O BUFFERS........................................................................................................................................61
DUAL MODE (CARDBUS/PCI) I/O BUFFERS.................................................................................................................62
POWER CONSUMPTION MEASUREMENTS...........................................................................63
STATIC CURRENT CONSUMPTION.................................................................................................................................63
CURRENT CONSUMPTION IN APPLICATION.................................................................................................................63
TIMING WAVEFORMS............................................................................................................64
14
PHYSICAL PACKAGE DETAILS.............................................................................................66